A Bluetooth Low-Energy Transceiver With 3.7-mW All-Digital Transmitter, 2.75-mW High-IF Discrete-Time Receiver, and TX/RX Switchable On-Chip Matching Network

Kuo, F. S.; Ferreira, Sandro Binsfeld; Chen, Huan-Neng Ron; Cho, Lan-Chou; Jou, Chewn-Pu; Hsueh, Fu-Lung; Madadi, Iman; Tohidian, Massoud; Shahmohammadi, Mina; Babaie, Masoud; Staszewski, Robert Bogdan

doi:10.1109/jssc.2017.2654322

Cited by 103 publications

(53 citation statements)

References 31 publications

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“…Feng-Wei Kuo et al presented a minimum power transceiver for IoT [34]. ADPLL based transmitter (TX) utilizes a current-source (DC) and amplification section for achieving high efficiency.…”

Section: Adpll For Iot and Ble Applicationsmentioning

confidence: 99%

An analysis of ADPLL applications in various fields

Rai¹,

Marimuthu²

2020

IJEECS

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<span>ADPLL is now an essential component in applications like wireless sensor networks, Internet of things, health care applications, agricultural applications, etc, and also due the requirement of digital implementation by the industries. ADPLL consists of a phase detector, loop filter and digital controlled oscillator. The conventional PLL and digital PLL used for frequency synthesis, clock recovery circuit and synchronization give imprecise performance with respect to reliability, speed, power consumption, noise, locking speed, cost, etc. ADPLL overcomes the drawbacks of conventional PLL and digital PLL. In this paper, different approaches followed in All Digital Phase Locked Loop (ADPLL) for various applications are reviewed and their performance is compared based on components, modulation functions, frequency range, power utilization etc. In addition, an ADPLL with wide tuning range and frequency resolution is designed and implemented using automatic placement and routing, time to digital converter, digital loop filter and ring based oscillator. The ADPLL outputs and the results are analyzed with micro wind tool. The design gives a frequency range from 1.0-5.5GHz with low power consumption and it can also be used for Clock generation applications. </span>

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“…Feng-Wei Kuo et al presented a minimum power transceiver for IoT [34]. ADPLL based transmitter (TX) utilizes a current-source (DC) and amplification section for achieving high efficiency.…”

Section: Adpll For Iot and Ble Applicationsmentioning

confidence: 99%

An analysis of ADPLL applications in various fields

Rai¹,

Marimuthu²

2020

IJEECS

View full text Add to dashboard Cite

show abstract

“…1(b). The supply voltage reduction results in significant power savings for the most power-hungry block, i.e., DCO [6], [8], and enables it to be supplied directly from energy harvesters. On the other hand, the TDC and all digital blocks, which consume relatively much less, are supplied from the proposed SC dc-dc converter that regulates the supply of TDC (and all other digital circuitry) to maintain the ADPLL's PN performance across voltage and temperature variations.…”

Section: Proposed Low-voltage Adpll Architecture With Pvt Toleranmentioning

confidence: 99%

A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS

Pourmousavian

Kuo

Siriburanon

et al. 2018

IEEE J. Solid-State Circuits

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This paper proposes an ultra-low-voltage (ULV) fractional-N all-digital PLL (ADPLL) powered from a single 0.5-V supply. While its digitally controlled oscillator (DCO) runs directly at 0.5 V, an internal switched-capacitor dc-dc converter "doubles" the supply voltage to all the digital circuitry and particularly regulates the time-to-digital converter (TDC) supply to stabilize its resolution, thus maintaining fixed in-band phase noise (PN) across process, voltage, and temperature (PVT). The ADPLL supports a two-point modulation and forms a Bluetooth low-energy (BLE) transmitter realized in 28-nm CMOS. It maintains in-band PN of −106 dBc/Hz [figure of merit (FoM) of −239.2 dB] and rms jitter of 0.86 ps while dissipating only 1.6 mW at 40-MHz reference. The power consumption reduces to 0.8 mW during the BLE transmission when the DCO switches to open loop. Index Terms-All-digital PLL (ADPLL), Bluetooth low energy (BLE), digitally controlled oscillator (DCO), Internet of Things (IoT), process, voltage, and temperature (PVT) insensitive, regulator, switched-capacitor (SC) dc-dc doubler.

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“…Open-loop modulation has recently gained popularity in ULP TXs due to its energy-saving feature by shutting down the all-digital phase locked loop (ADPLL) loop after quickly acquiring the channel center frequency [1], [6], [8]- [10]. Further improvements in substantially lowering of the DCO flicker noise help to bring the carrier frequency drift to well within the IoT specifications [6], [10].…”

Section: Introductionmentioning

confidence: 99%

A Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push–Pull LNA

Yin

Mak

et al. 2020

IEEE J. Solid-State Circuits

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We propose a simple power-efficient sub-1-V fully integrated RF front end (RFE) for 2.4-GHz transceivers. It introduces the following innovations. First, a function-reuse single-MOS digitally controlled oscillator power amplifier (DCO-PA) with full supply utilization improves antenna-to-DCO isolation for better resilience to jammers. Second, a noninverting transmitter (TX) matching transformer with a zero-shifting capacitor suppresses the second-harmonic emission of the DCO-PA and allows a single-pin antenna interface for both TX and receiver (RX) modes eliminating the transmit/receive (T/R) switches in the signal path. Third, a push-pull low-noise amplifier (LNA) reuses the TX matching transformer for passive gain boosting that reduces power consumption. Fabricated in 65-nm CMOS, the RFE occupies merely 0.17 mm 2. Through the functional merge of the oscillator and PA, it can transmit 0 dBm at RF, featuring 10.2% power efficiency when delivering the RF power as low as −10 dBm at a 0.3-V supply. Under a 0.5-V supply, the LNA shows 11-dB gain and 6.8-dB noise figure (NF) while consuming 174 µW.

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A Bluetooth Low-Energy Transceiver With 3.7-mW All-Digital Transmitter, 2.75-mW High-IF Discrete-Time Receiver, and TX/RX Switchable On-Chip Matching Network

Cited by 103 publications

References 31 publications

An analysis of ADPLL applications in various fields

An analysis of ADPLL applications in various fields

A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS

A Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push–Pull LNA

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