A Blocked All-Pairs Shortest-Paths Algorithm

Venkataraman, Gayathri; Sahni, Sartaj; Mukhopadhyaya, Srabani

doi:10.1007/3-540-44985-x_36

Cited by 28 publications

(45 citation statements)

References 15 publications

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“…We have related these performance gains to improved memory system behavior of the optimized programs. Both our work and previous research [14,19] show that the algorithmic transformation of dynamic programming is an efficient and important approach to optimize irregular programs.…”

Section: Discussionmentioning

confidence: 89%

“…LaMarca et al [11] developed analytical models and showed simulation results predicting the number of cache misses for heaps. For dynamic programming algorithms, Venkataraman et al [19] presented tiled implementation of the Floyd-Warshall algorithm and derived an upper bound of an achievable speedup of 2 for state-of-the-art architectures. The common feature of these work is cache-aware, that is, the optimized algorithm contains parameters (set at either compile-time or runtime) that can be tuned to optimize the algorithm for some particular cache size and organization.…”

Section: Related Workmentioning

confidence: 98%

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Cache oblivious algorithms for nonserial polyadic programming

2007

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The nonserial polyadic dynamic programming algorithm is one of the most fundamental algorithms for solving discrete optimization problems. Although the loops in the nonserial polyadic dynamic programming algorithm are similar to those in matrix multiplication, the available automatic optimization techniques have little effect on this imperfect loop because of nonuniform data dependencies. In this paper, we develop algorithmic optimizations to improve the cache performance of the nonserial polyadic dynamic programming algorithm. Our algorithmic transformation takes advantage of the cache oblivious method by relaxing some dependencies in the standard iterative version. Based on the ideal cache model of the cache oblivious algorithm, the approximate bound of cache misses is given by ( n 3 Z L √ Z). We also found that the optimized algorithm with the cache oblivious approach is more sensitive to conventional optimization techniques such as tiling. Experimental results on several platforms show that the optimized algorithms improve the cache performance and achieves speedups of 2-10 times.

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Section: Discussionmentioning

confidence: 89%

Section: Related Workmentioning

confidence: 98%

Cache oblivious algorithms for nonserial polyadic programming

2007

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“…This is the current known best result of the APSP problem on GPUs. Matsumoto et al proposed a hybrid APSP work based on the work in [46,33]. Here the authors used a block based structure for the minimization of communication overheads between CPU and GPU and is hence more efficient.…”

Section: Related Workmentioning

confidence: 97%

“…On GPUs, there are very few reported implementations. Notable among these are those of Harish et al [20], Katz et al [25], and [46]. In Harish et al [20], the problem is solved by running a parallel Dijkstra's algorithm [15].…”

Section: All Pairs Shortest Pathsmentioning

confidence: 99%

“…In this work, the author proposed a parallel implementation of the popular Floyd-Warshall algorithm on an early generation FX5900 GPU which showed speedups upto 3x over sequential CPU code. In a more recent work [46], Venkatraman et al proposed a blocked parallel implementation of the APSP problem. Here, the authors showed a more cache efficient algorithm of the problem that utilizes the cache hierarchies present in the CPUs to provide a 1.6x to 1.9x speedup.…”

Section: Related Workmentioning

confidence: 99%

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