Cache oblivious algorithms for nonserial polyadic programming

Abstract

The nonserial polyadic dynamic programming algorithm is one of the most fundamental algorithms for solving discrete optimization problems. Although the loops in the nonserial polyadic dynamic programming algorithm are similar to those in matrix multiplication, the available automatic optimization techniques have little effect on this imperfect loop because of nonuniform data dependencies. In this paper, we develop algorithmic optimizations to improve the cache performance of the nonserial polyadic dynamic programming algorithm. Our algorithmic transformation takes advantage of the cache oblivious method by relaxing some dependencies in the standard iterative version. Based on the ideal cache model of the cache oblivious algorithm, the approximate bound of cache misses is given by ( n 3 Z L √ Z). We also found that the optimized algorithm with the cache oblivious approach is more sensitive to conventional optimization techniques such as tiling. Experimental results on several platforms show that the optimized algorithms improve the cache performance and achieves speedups of 2-10 times.

Overview of Memristor-Based Neural Network Design and Applications

“…There is an urgent need for new computing models to re-empower human society's ability to process big data. Options that have been examined include using a nonvolatile memory device, breaking the "storage wall," simulating the human brain processing mechanism, and building integrated computing architectures that combine storage and computation hardware [5]. Hardware neural networks based on memristor synaptic devices has proven to be an important development for neuromorphic computing and a strong candidate to replace traditional von Neumann computing architecture in a post-Moorish era.…”