A Binary Translation Backend Registers Allocation Algorithm Based on Priority

Wang, Jun; Pang, Jianmin; Fu, Liguo; Shan, Zheng; Yue, Feng; Zhang, Jiahao

doi:10.1007/978-981-13-0896-3_41

Cited by 3 publications

(3 citation statements)

References 3 publications

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“…Some research studies have been conducted to address these issues. There are many optimization methods for dynamic binary translation, such as hot path optimization [18], register mapping optimization [19,20], multi-threaded parallel optimization [17], and memory access optimization [21]. Díaz et al proposed a joint hardware/software simulation virtual platform scheme to address the difficulty of system verification for heterogeneous and homogeneous architectures and implemented a parallelized QEMU prototype [22].…”

Section: Overviewmentioning

confidence: 99%

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A Dynamic and Static Binary Translation Method Based on Branch Prediction

Sun,

Wu,

et al. 2023

Electronics

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Binary translation is an important technique for achieving cross-architecture software migration. However, mainstream dynamic binary translation frameworks, such as QEMU, often generate a large amount of redundant code, which degrades the efficiency of the target code. To this end, we propose a dynamic–static binary translation method based on branch prediction. It first identifies parts of translation blocks following static branch prediction techniques. Then it translates these translation blocks into less-redundant native code blocks by canonical static translation algorithms. Finally, it executes all code blocks that are translated either statically or dynamically by correctly maintaining and switching their running contexts. In order to correctly weave the two types of translation activities, the proposed method only translates the next translation block that is data-independent from the current one by the active variable analysis algorithm, and records and shares the intermediate states of the dynamic and static translation activities via a carefully designed data structure. In particular, a shadow register-based context recovery mechanism is proposed to correctly record the running context of static translation blocks, and to correctly recover the context for dynamically translating and running blocks that were not statically translated. We also designed an adaptive memory optimization mechanism to dynamically release the memory of the mispredicted translation blocks. We implemented a dynamic–static binary translation framework by extending QEMU, called BP-QEMU (QEMU with branch prediction). We evaluated the translation correctness of BP-QEMU using the testing programs for the ARM and PPC instruction sets from QEMU, and evaluated the performance of BP-QEMU using the CoreMark benchmark code. The experimental results show that BP-QEMU can translate the instructions from the ARM and PPC architectures correctly; moreover, the average execution efficiency of the CoreMark code on BP-QEMU improves by 13.3% compared to that of QEMU.

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Section: Overviewmentioning

confidence: 99%

“…However, we cannot obtain or reproduce its solution according to the published materials. Second, it is not necessary to compare our method with the works that focus solely on the optimization of dynamic binary translation [17][18][19][20][21][22][23], which are actually complementary to our method.…”

Section: Correctness and Efficiency Experimentsmentioning

confidence: 99%

A Dynamic and Static Binary Translation Method Based on Branch Prediction

Sun,

Wu,

et al. 2023

Electronics

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“…Hence, it is not suitable to use some deep and complex optimization methods. Even though there are many optimization methods, such as hot path optimization [15], register mapping optimization [16], [17], multi-threaded parallel optimization [9] and memory access optimization [18], which can improve the efficiency of dynamic binary translation effectively, the problem of low efficiency in dynamic binary translation is still prominent. Generally speaking, DBT has drawn much attention in research and application for its good completeness and adaptability [19].…”

Section: Introductionmentioning

confidence: 99%

Dynamic Translation Optimization Method Based on Static Pre-Translation

Wang¹,

Pang²,

Liu³

et al. 2019

IEEE Access

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Binary translation technology is an effective method to solve the problem of software cross-platform transplantation, especially for software porting without source code. Static binary translation has a good translation effect in general, but it faces the problem of code discovery. Dynamic binary translation can completely reproduce the execution process of the source program according to the execution order of the binary code. But it is severely limited by its low efficiency, as the time of translation is part of the whole runtime and it is no time for better code optimization in dynamic binary translation. This paper aims to optimize the execution process of dynamic binary translation by taking full advantage of the strengths of static binary translation. An optimization method of dynamic binary translation with static pre-translation was proposed in this paper. By pre-translating the source program and using more in-depth code optimization method to optimize the translated code, most of the code translation time can be cut down and the translated code will be more efficient. A new dynamic translation framework with the static pre-translation module, based on the dynamic translator named QEMU (a quick emulator), was designed to translate the x86 program to the Sunway platform. As the experimental results show, the framework and optimization method are valid to improve the efficiency of the general dynamic translator.

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An Instruction Inflation Analyzing Framework for Dynamic Binary Translators

Xie,

Yan,

Yan

et al. 2024

ACM Trans. Archit. Code Optim.

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Dynamic binary translators (DBTs) are widely used to migrate applications between different instruction set architectures (ISAs). Despite extensive research to improve DBT performance, noticeable overhead remains, preventing near-native performance, especially when translating from complex instruction set computer (CISC) to reduced instruction set computer (RISC). For computational workloads, the main overhead stems from translated code quality. Experimental data show state-of-the-art DBT products have dynamic code inflation of at least 1.46. This indicates on average over 1.46 host instructions are needed to emulate one guest instruction. Worse, inflation closely correlates with translated code quality. However, the detailed sources of instruction inflation remain unclear. To understand the sources of inflation, we present Deflater, an instruction inflation analysis framework comprising a mathematical model, a collection of black-box unit tests called BenchMIAOes, and a trace-based simulator called InflatSim. The mathematical model calculates overall inflation based on the inflation of individual instructions and translation block (TB) optimizations. BenchMIAOes extract model parameters from DBTs without accessing DBT source code. InflatSim implements the model and uses the extracted parameters from BenchMIAOes to simulate a given DBT’s behavior. Deflater is a valuable tool to guide DBT analysis and improvement. Using Deflater, we simulated inflation for three state-of-the-art CISC-to-RISC DBTs: ExaGear, Rosetta2, and LATX, with inflation errors of 5.63%, 5.15%, and 3.44% respectively for SPEC CPU 2017, gaining insights into these commercial DBTs. Deflater also efficiently models inflation for the open-source DBT QEMU and suggests optimizations that can substantially reduce inflation. Implementing the suggested optimizations confirms Deflater’s effective guidance, with 4.65% inflation error, and gains 5.47x performance improvement.

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A Binary Translation Backend Registers Allocation Algorithm Based on Priority

Cited by 3 publications

References 3 publications

A Dynamic and Static Binary Translation Method Based on Branch Prediction

A Dynamic and Static Binary Translation Method Based on Branch Prediction

Dynamic Translation Optimization Method Based on Static Pre-Translation

An Instruction Inflation Analyzing Framework for Dynamic Binary Translators

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