A 90nm CMOS single-chip GPS receiver with 5dBm out-of-band IIP3 2.0dB NF

Abstract

A single-chip GPS receiver for GSM and CDMA handsets, designed to provide location identification feature, is described in this paper. This receiver uses a low-IF RF-front-end, that includes an LNA, image rejection using IQ mixers and passive poly-phase filter, and a fully integrated synthesizer. The IF-strip consists of a jammer-reject filter, a VGA, delta-sigma ADC and a digital IF-filter. An attempt is made to minimize the number of external components and have only a single pre-select filter between the antenna and the IC. In the absence of any SAW filter, the ability of the receiver to tolerate jammers is very critical, due to the vicinity of the transmitter of the handset. The receiver works in the GPS L-1 band at 1575.42MHz, which carries the C/A code.Recently, there has been an increased level of interest in GPS receivers [1][2][3]. A very low-power CMOS implementation, that uses a 2b quantizer and external loop-filters for its synthesizer and AGC, is reported in [2]. The receiver discussed in [4] uses a SAW filter for the IF filtering and an external loop-filter for the synthesizer.This chip uses an IF of 4.092MHz. Direct conversion and low-IF are the most popular wireless receiver architectures today. Direct conversion avoids the problem of image frequency, but issues associated with low-frequency noise, DC offset and LO-leakage make its implementation extremely difficult. Frequency planning of the proposed receiver is chosen to keep the reference clock harmonics and any wireless transmissions far away from the signal and image bands. Hence the primary requirement on image rejection is to reject the thermal noise in the image-band, and a relatively low image-rejection of 15dB can preserve the in-band SNR. A pre-select filter is required to keep the out-of-band signals from blocking the receiver. The block diagram of the receiver is shown in Fig. 17.1.1. The receiver uses no off-chip component, other than a crystal for reference clock and supply-decoupling capacitors. Except for the LNA, the entire receiver uses differential signal processing to improve immunity to supply and substrate disturbances.The LNA has single-ended input and differential output. Pinout is selected to isolate the RF signals from other package coupling. LNA uses tuned load designed with spiral inductors for improved linearity and NF. The LNA output is applied to two double-balanced mixers through capacitors used for AC coupling and matching. These two mixers perform down-conversion using I and Q components of LO. Subsequently, the IF-chain performs filtering and further amplification. The linearity of GPS signal in the presence of cellular-band jammers is one of the key performance parameters of this front-end.The first block in the IF-chain is a second-order regulated cascode stage. This filter rejects the out-of-band jammers, that are at least 140MHz away from GPS band. This block also provides lownoise amplification of the IF signal. The amplification in this stage comes from ratio of resistors and hence the required IQ balance ...

A crystal-tolerant fully integrated CMOS low-IF dual-band GPS receiver

“…The overall power consumption is 18 mW from a 1.2 V supply. These points of strength differentiates this work from other published work in the same field [1][2][3][4][5].…”

“…The LNA input is singled ended to omit the need of an off-chip balun. The output of M1 is used as an input to M2 via capacitor C1, producing a pseudo-differential structure of the LNA to increase its immunity to supply and substrate noise [5]. A real differential cascode is not adopted here as it will suffer from reduced linearity, and the tail current source will consume considerable part of the small available 1.2 V supply headroom.…”

A tri-mode Compass/GPS/Galileo RF receiver with all-digital automatic gain control loop

“…As shown in Fig. 1, the received signal power is about -130 dBm for three mentioned band which is approximately 20 dB below the thermal noise [1][2][3][4]. Therefore, the signal is dominated by thermal noise and no other signal is presented excepted for intentional jamming.…”

“…Since the down converted signal around DC with zero-IF architecture will be greatly affected by flicker noise and DC offset, low-IF architecture is preferred even though zero-IF receivers are more easily integrated [2][3][4][5]. For this reason, low-IF architecture is chosen in this tri-mode receiver to balance flicker noise, DC offset and image rejection.…”

“…Due to the increasing demands for low cost and high level integration, the efforts on GPS receivers have been made and several successful fully integrated GPS RF receivers have been reported [1][2][3][4][5][6][7][8].…”