A 9-T 833-MHz 1.72-fJ/Bit/Search Quasi-Static Ternary Fully Associative Cache Tag With Selective Matchline Evaluation for Wire Speed Applications

Mishra, Sandeep; Mahendra, Telajala Venkata; Dandapat, Anup

doi:10.1109/tcsi.2016.2592182

Cited by 25 publications

(10 citation statements)

References 30 publications

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“…Segmented ML technique proved to be the best to handle all the performance metrics. Table 2 Performance comparison summary of ML-sensing techniques Precharge high [6,14,15] Current-race scheme [22,33] Precharge free [29][30][31][32] Low swing [11,[34][35][36] Segmented [37][38][39][40][41][42][43][44][45] Sele. precharge [46][47][48]…”

Section: Resultsmentioning

confidence: 99%

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The analogy of matchline sensing techniques for content addressable memory (CAM)

Mishra¹,

Mahendra

Hussain

et al. 2020

IET Computers & Digital Techniques

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Performance of a memory depends on the storage stability, yield and sensing speed. Differential input and the latching time of sense amplifiers are considered as primary performance factors in static random access memory. In a content addressable memory (CAM), the sensing is carried out through the matchline (ML) and the time for evaluation is the key to decide the search speed. The density of CAM is on a rise to accommodate a higher amount of information which increases the power dissipation associated with it. Issues such as the logical threshold variation and lower noise margin between match and mismatch are critical in the operation of a CAM. A good ML sensing technique can reduce the ML power with enhanced evaluation speed. This work provides an analogy of various ML sensing techniques based on their pre-charging, evaluation and performance improvement strategies. Estimation on the power dissipation and evaluation time are made and in-depth analysis on their power-speed-overhead trade-off are carried on 64-bit CAM macros.

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Section: Resultsmentioning

confidence: 99%

“…(i) Pre-charge high ML sensing technique [6,14,15]: a simple yet power hungry approach used by most CAM designers. (ii) Current race sensing [22,33]: a pre-charge low strategy on the ML using a current source.…”

Section: Sensing Techniquesmentioning

confidence: 99%

The analogy of matchline sensing techniques for content addressable memory (CAM)

Mishra¹,

Mahendra

Hussain

et al. 2020

IET Computers & Digital Techniques

Self Cite

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“…The search input binary data are compared with contents in the CAM through input data drivers. In CAM, the binary word of every row is checked against the search input word parallel within a clock cycle [7]. CAM performs two important functions: write and search.…”

Section: Content Addressable Memorymentioning

confidence: 99%

Dual bit control low-power dynamic content addressable memory design for IoT applications

Satyanarayana¹,

Sridevi²

2021

Turk J Elec Eng & Comp Sci

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The Internet of things (IoT) is an emerging area in the semiconductor industry for low-power and high-speed applications. Many search engines of IoT applications require low power consumption and high-speed content addressable memory (CAM) devices for the transmission of data packets between servers and end devices. A CAM is a hardware device used for transfer of packets in a network router with high speed at the cost of power consumption. In this paper, a new dual bit control precharge free (PF) dynamic content addressable memory (DCAM) has been introduced. The proposed design uses a new charge control circuitry, which is used to control the dual DCAM cell to get the match line output for match/miss. Elimination of the precharge phase before the evaluation phase allows the proposed design to perform more search operations within the evaluation time. The proposed 64-bit PF-DCAM design is implemented using a CMOS 45-nm technology node and Monte Carlo simulations are performed for power and search delay validation. The simulation results show that the proposed design reduces power and search delay when compared to conventional DCAM designs.

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“…Introduction: The significance of high-density content addressable memory (CAM) is rapidly increasing with more demand for hardware search engines in modern computing and security systems. Software algorithms are limited due to hardship of low search speed [1], while a hardware engine such as CAM fits well in network applications. CAM performs search operation within single clock cycle [1] because of the parallel comparison feature of the search key with stored words in memory array.…”

mentioning

confidence: 99%

“…Software algorithms are limited due to hardship of low search speed [1], while a hardware engine such as CAM fits well in network applications. CAM performs search operation within single clock cycle [1] because of the parallel comparison feature of the search key with stored words in memory array. Static CAM utilises static random access memory cell for storage and hence dissipates unwanted leakages besides putting constraints on the cell area.…”

mentioning

confidence: 99%

Precharge free dynamic content addressable memory

Mahendra¹,

Hussain²,

Mishra³

et al. 2018

Electron. lett.

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A precharge free dynamic content addressable memory (DCAM) is introduced for low-power and high-speed search applications. Elimination of precharge prior to search allows hardware engine to perform more number of searches within the stipulated time. The proposed DCAM cell not only removes precharge of matchline (ML) but also utilises decoupling of bitline and searchline so that unwanted capacitive couplings are minimised at charge storage nodes. A 512 bit of the proposed scheme is implemented using 45 nm CMOS technology and its efficacy is verified and proved through rigorous variations with 1000-point Monte-Carlo sampling of ML voltage as well as multi-search dissipation analysis.

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A 9-T 833-MHz 1.72-fJ/Bit/Search Quasi-Static Ternary Fully Associative Cache Tag With Selective Matchline Evaluation for Wire Speed Applications

Cited by 25 publications

References 30 publications

The analogy of matchline sensing techniques for content addressable memory (CAM)

The analogy of matchline sensing techniques for content addressable memory (CAM)

Dual bit control low-power dynamic content addressable memory design for IoT applications

Precharge free dynamic content addressable memory

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