A 78-dB gain range low power CMOS RF digitally programmable gain amplifier for mobile terrestrial D-TV tuner IC

Kim, Tae Wook; Kim, Bonkee

doi:10.1109/lmwc.2006.872130

Cited by 5 publications

References 4 publications

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A 40 M–1000 MHz 77.2‐dB spurious free dynamic range CMOS RF variable gain amplifier for digital TV tuner ICs

Kwon

2014

Circuit Theory & Apps

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In this paper, a 40 M-1000 MHz 77.2-dB spurious free dynamic range (SFDR) CMOS RF variable gain amplifier (VGA) has been presented for digital TV tuner applications. The proposed RFVGA adopts a wideband operational-amplifier-based VGA and a wideband buffer with differential multiple gated transistor linearization method for wideband operation and high linearity. The SFDR of the proposed RFVGA is also analyzed in detail. Fabricated in a 0.13-μm CMOS process, the RFVGA provides 31-dB gain range with 1-dB gain step, a minimum noise figure of 7.5 dB at a maximum gain of 27 dB, and maximum in-band outputreferred third-order intercept point of 27.7 dBm, while drawing an average current of 27.8 mA with a supply voltage of 3.3 V. The chip core area is 0.54 mm × 0.4 mm.In this section, the SFDR of the proposed RFVGA is derived. For that, the noise figure and linearity of the RFVGA are analyzed in detail. Figure 6. (a) g m of the FDA(Mcs1), AT(Mcs2), and FDA with DMGTR. (b) g m ″ of the FDA(Mcs1), AT (Mcs2), and FDA with DMGTR.Figure 7. Simulated OIP3 of the proposed buffer versus PVT (process, voltage, temperature) variation.

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A 40 M–1000 MHz 77.2‐dB spurious free dynamic range CMOS RF variable gain amplifier for digital TV tuner ICs

Kwon

2014

Circuit Theory & Apps

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A VHF RFPGA with adaptive phase-correction technique

Cheng¹,

Guo²,

Yan³

et al. 2013

J. Semicond.

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This paper presents a VHF (30-300 MHz) RF programmable gain amplifier (PGA) with an adaptive phase correction technique. The proposed technique effectively mitigates phase errors over the VHF band, and the RFPGA as a whole satisfies all the specifications of the China mobile multimedia broadcasting VHF band applications. The RFPGA is implemented with a TSMC 0.25 m CMOS process. Measurement results reveal a gain range of around 61 dB, an IIP3 of -7 dBm at maximum gain, a power consumption of 10.2 mA at maximum gain, and a phase imbalance of less than 0.3 degrees.

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