A 700 MHz laser radar receiver realized in 0.18 μm HV-CMOS

Abstract

This study presents a CMOS receiver chip realized in 0.18 µm High-Voltage CMOS (HV-CMOS) technology and intended for high precision pulsed time-of-flight laser range finding utilizing high-energy sub-ns laser pulses. The IC chip includes a trans-impedance preamplifier, a post-amplifier and a timing comparator. Timing discrimination is based on leading edge detection and the trailing edge is also discriminated for measuring the width of the pulse. The transimpedance of the channel is 25 kΩ, the uncompensated walk error is 470 ps in the dynamic range of 1:21,000 and the input referred equivalent noise current 450 nA (rms).

A CMOS Optoelectronic Receiver IC with an On-Chip Avalanche Photodiode for Home-Monitoring LiDAR Sensors

“…Therefore, it could not avoid the increase of cost and form factor. References [ 12 , 13 , 14 , 15 ] exploited off-chip APDs, which resulted in hardware complexity in an array configuration of multi-channel receivers.…”

Experimental Investigation Into Laser Ranging With Sub-ns Laser Pulses

“…The receiver channel circuit was fabricated in a 0.18 µm HVCMOS technology and included a transimpedance preamplifier, a post-amplifier and a timing comparator which discriminates the timing signals from the leading and the trailing edges, giving two stop pulses (Stop 1 for the leading edge of the pulse and Stop 2 for the trailing edge) [28]. Both edges are discriminated, which in principle also allows walk error compensation.…”

“…The bandwidth of the receiver is ~ 700 MHz and the equivalent transimpedance ~ 25 kΩ. The input referred noise current is approximately 450 nA with a discrete APD at the input [28]. The transimpedance amplifier and the comparator use a 1.8 V supply voltage, but thanks to the high voltage (HV) design, the internal level shifters giving a 2.5 to 5 V output are located in the chip and can thus be used with a time-to-digital converter (TDC) using a supply voltage of 3.3 V. A photograph of the receiver channel chip is shown in Fig.…”