Taking into consideration the limitations of the conventional vector sum phase shifter (VSPS), a low power LNA-PS is proposed for a 60 GHz beamforming receiver using a 65 nm CMOS process. By developing a low loss 90 PS that integrates the HPF into the LPF with a low loss SPST switch and a power efficient vector adder using a current reuse structure, the proposed LNA-PS shows the gain of 24 dB, the highest among the LNA-PSs developed to date, with very small power consumption of 16 mW. The total size including the pads is only 1.3 .Index Terms-Beamforming, CMOS, LNA, phase shifter, 60 GHz.As the number of transistors ( ) increases, the output current decreases, leading to poor combining efficiency.Given that fewer combining paths can guarantee better power combining efficiency, we propose another type of VSPS that