A 5.3 pJ/op approximate TTA VLIW tailored for machine learning

Teittinen, Jukka; Hiienkari, Markus; liobait, Indr; Hollmén, Jaakko; Berg, Heikki; Heiskala, Juha; Viitanen, Timo; Simonsson, Jesse; Koskinen, Lauri

doi:10.1016/j.mejo.2017.01.007

Cited by 4 publications

(3 citation statements)

References 17 publications

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“…When with peak energy efficiency for various architectures in the literature this is quite acceptable. For example, a TTA-like VLIW architecture, optimized for machine learning, achieves 5.3 pJ/operation (28 nm FDSOI at 0.35 V) [37] while Dally et al [38] stated that a typical VLIW achieves an energy efficiency of around 10 pJ/operation. The symbiote [39] VLIW coprocessor achieves 28 pJ/operation.…”

Section: Summary Of Resultsmentioning

confidence: 99%

Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture

Wijtvliet

Kumar

Corporaal

2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Demand for coarse grain reconfigurable architectures (CGRAs) has significantly increased in recent years as architectures need to be both energy efficient and flexible. However, most CGRAs are optimized for performance instead of energy efficiency. In this work, a novel paradigm for reconfigurable architectures, Blocks, is presented. Blocks uses two separate circuit-switched networks, one for control and one for the data path. This enables the runtime construction of energy-efficient application-specific VLIW-SIMD processors on a reconfigurable fabric. Its energy efficiency is demonstrated by comparing Blocks to four reference architectures, a VLIW, an SIMD, a commercial low-power microprocessor, and a traditional CGRA. All comparisons are based on commercial low-power 40-nm CMOS layout, including memories. Results show that Blocks can achieve a mean total energy reduction of 2.05×, 1.84×, 8.01×, and 1.22× over a VLIW, an SIMD, an energyefficient microprocessor and a traditional CGRA, respectively. At the same time, Blocks delivers equal or higher performance per area due to its ability to adapt to applications by reconfiguration.

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Section: Summary Of Resultsmentioning

confidence: 99%

Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture

Wijtvliet

Kumar

Corporaal

2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…In [101], the solution aims to achieve energy efficiency VOLUME 4, 2016 within the Internet of things ( IoT). Implementing a machine learning algorithm on an IoT device rather than on a cloud is a way to achieve energy efficiency.…”

Section: F Resource Limitationsmentioning

confidence: 99%

Industrial Internet of Things: Requirements, Architecture, Challenges, and Future Research Directions

2022

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Industry 4.0 relates to the digital revolution of manufacturing and other markets such as retail, distribution, oil and gas, and infrastructure. On the other hand, the Industrial Internet of Things (IIoT) is a technological advancement that leads to Industry 4.0 implementation by boosting the manufacturing sector's productivity and economic impact. IIoT provides the ability to provide global connectivity between components in different locations. The manufacturing sector has had various difficulties implementing IIoT, primarily due to IoT characteristics. We offer an in-depth review of Industry 4.0 and IIoT in this survey. The primary motivation behind this survey is to introduce the most recent advancements related to Industry 4.0 and IIoT and to address the existing limitations. First, we provide a novel taxonomy of IIoT challenges that includes aspects of each challenge, such as the terminology and approaches utilized to solve these challenges. Besides IIoT challenges, this survey provides an in-depth demonstration of the many concepts related to IIoT, such as architecture and use cases. Second, the study provides a comprehensive review to study the state-of-the-art of Industry 4 in terms of concepts, requirements and supporting technology. In addition, we discuss the correlation between enabling technology and technical requirements in detail. Finally, our survey targets deep learning, edge computing, and big data as key techniques for future IIoT. Furthermore, the presented technique is thoroughly examined to present a different method for future adoption. Additionally, to the proposed technique, we propose a new architecture for the future of IIoT based on three primary techniques.

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“…Both of these techniques could be applied on top of our proposed cores to improve the energy efficiency even further. In fact, there is already previous work of a chip implementation of an application-specific sub-threshold voltage transporttriggered architecture (TTA) core developed using the same tools and the processor template as the cores proposed in this paper [16].…”

Section: Related Workmentioning

confidence: 99%

Energy Efficient Low Latency Multi-issue Cores for Intelligent Always-On IoT Applications

Multanen

Kultala

Tervo

et al. 2020

J Sign Process Syst

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Advanced Internet-of-Things applications require control-oriented codes to be executed with low latency for fast responsivity while their advanced signal processing and decision making tasks require computational capabilities. For this context, we propose three multi-issue core designs featuring an exposed datapath architecture with high performance, while retaining energy-efficiency. These features are achieved with exploitation of instruction-level parallelism, fast branching and the use of an instruction register file. With benchmarks in control-flow and signal processing application domains we measured in the best case 64% reduced energy consumption compared to a state-of-the-art RISC core, while consuming less silicon area. A high-performance design point reaches nearly 2.6 GHz operating frequency in the best case, over 2× improvement, while simultaneously achieving a 14% improvement in system energy-delay product.

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A 5.3 pJ/op approximate TTA VLIW tailored for machine learning

Cited by 4 publications

References 17 publications

Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture

Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture

Industrial Internet of Things: Requirements, Architecture, Challenges, and Future Research Directions

Energy Efficient Low Latency Multi-issue Cores for Intelligent Always-On IoT Applications

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