A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms

Cakir, Cagla; Chen, Andy W.; Chong, YK; Thyagarajan, Sriram; McCartney, Mark; Tan, Peixuan; Shi, Yu; Bhargava, Mudit

doi:10.23919/vlsic.2019.8778108

2019 Symposium on VLSI Circuits 2019

DOI: 10.23919/vlsic.2019.8778108

|View full text |Cite

A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms

Cagla Cakir

Andy W. Chen

YK Chong

et al.

Help me understand this report

This publication either has no citations yet, or we are still processing them

Set email alert for when this publication receives citations?

See others like this or search for similar articles

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

hi@scite.ai

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms

This publication either has no citations yet, or we are still processing them

See others like this or search for similar articles

Contact Info

Product

Resources

About