A 48 GHz 6-bit LO-path phase shifter in 40-nm CMOS for 60 GHz applications

Analysis and Design of a 14.1-mW 50/100-GHz Transformer-Based PLL With Embedded Phase Shifter in 65-nm CMOS

“…By duplicating and reusing them as phase shifters, phase shifting can be achieved at the second . Compared with the existing phase-shifting scheme in dual-conversion phased-array TRXs in [12] and [14], which require extra phase shifters together with frequency dividers/multipliers, the proposed embedded phase shifter can reduce power consumption and area. Fig.…”

“…Moreover, small amplitude variation is also required for a high peak-to-null ratio of the array pattern [14]. Existing passive phase shifters are mainly based on transmission lines [12] and thus require large area (0.14 mm for a single phase shifter in [12]). Active phase shifters based on in-phase/quadrature (IQ) interpolation [3] feature a smaller area and lower insertion loss at the expense of larger power consumption and requiring of quadrature input according to [14].…”

“…Moreover, they require large supply voltages (1-2.5 V) for proper locking and oscillation with acceptable amplitude, phase noise, and frequency locking range. Finally, when used in phased-array TRXs, the PLL output phases need to be tuned by extra mm-Wave phase shifters, which are typically power hungry, lossy, and suffer from large amplitude variation [12]- [14]. Fig.…”

A Delay-Based LO Phase-Shifting Generator for a 2-5GHz Beamsteering Receiver in 28nm CMOS

“…In the array transceivers signal composition can be implemented in different stages. Existing architectures bring signal to the baseband summation after applying analog phase shifts at either RF [3], [4] or LO [5], [6] blocks of the receiver, or operate directly at the baseband [7], [8]. Currently, the typical approach is to use passive phase shifters at the mm-wave region while the sub-6GHz designs are shifting towards digitally friendly solutions, leveraging downscaling trend, highest integration level and lowest cost offered by CMOS technology.…”

A modulator-less beam steering transmitter based on a revised DDS-PLL phase shifter architecture

“…In fact, rather than actual time delays they introduce constant phase offsets. In [9], Lu et al propose an LO-phase shifting receiver front-end, where a tunable transmission line loaded with switched capacitors is used to implement fine grained phase shifts in the first downconversion stage. In [10], Hashemi et al propose a fully integrated 24-GHz LO-phase shifting receiver for phased arrays, based on a 19.2-GHz CMOS ring VCO.…”