2020
DOI: 10.1109/access.2020.3026678
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A 40nm CMOS Hysteretic Buck DC-DC Converter With Digital-Controlled Power-Driving-Tracked-Duration Current Pump

Abstract: The authors would like to thank MediaTek, Singapore for the scholarship and the sponsorship of chip fabrication.

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Cited by 6 publications
(2 citation statements)
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“…One of the main challenges in designing a synchronous buck converter is achieving precise voltage regulation under varying load conditions, input voltage fluctuations, and temperature changes [10]. To address this challenge, the control strategy of the synchronous buck converter plays a critical role in ensuring stable and efficient operation.…”
Section: Int J Elec and Comp Engmentioning
confidence: 99%
“…One of the main challenges in designing a synchronous buck converter is achieving precise voltage regulation under varying load conditions, input voltage fluctuations, and temperature changes [10]. To address this challenge, the control strategy of the synchronous buck converter plays a critical role in ensuring stable and efficient operation.…”
Section: Int J Elec and Comp Engmentioning
confidence: 99%
“…However, both methods could prolong transient response. To improve transient response, an accelerating circuit or an embedded digital algorithm was augmented to reduce the transient recovery time [21][22][23][24][25][26][27][28][29][30][31][32][33].…”
Section: Introductionmentioning
confidence: 99%