2014 IEEE Asian Solid-State Circuits Conference (A-Sscc) 2014
DOI: 10.1109/asscc.2014.7008896
|View full text |Cite
|
Sign up to set email alerts
|

A 330μW, 64-channel neural recording sensor with embedded spike feature extraction and auto-calibration

Abstract: This paper reports an integrated 64-channel neural recording sensor. Neural signals are acquired, filtered, digitized and compressed in the channels. Additionally, each channel implements an auto-calibration mechanism which configures the transfer characteristics of the recording site. The system has two transmission modes; in one case the information captured by the channels is sent as uncompressed raw data; in the other, feature vectors extracted from the detected neural spikes are released. Data streams com… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

0
3
0

Year Published

2016
2016
2017
2017

Publication Types

Select...
2
2

Relationship

1
3

Authors

Journals

citations
Cited by 4 publications
(3 citation statements)
references
References 9 publications
0
3
0
Order By: Relevance
“…All these features make the proposed neural spike recording SoC an observation tool which allows neurologists to examine the state of the implant and eventually reconfigure the array of sensors to better serve the purposes of the application at hand. This paper extends the results in [29] and describes the acquisition and communications sections of the SoC, the partitioning of the signal processing tasks, and the structure of the digitally-assisted neural recording channels. Additionally, it describes and experimentally demonstrates the programming and self-adaptation techniques embedded in the SoC, assesses the accuracy of the implemented data reduction algorithms and includes in vivo measurements under raw data and feature extraction modes.…”
Section: Introductionmentioning
confidence: 61%
“…All these features make the proposed neural spike recording SoC an observation tool which allows neurologists to examine the state of the implant and eventually reconfigure the array of sensors to better serve the purposes of the application at hand. This paper extends the results in [29] and describes the acquisition and communications sections of the SoC, the partitioning of the signal processing tasks, and the structure of the digitally-assisted neural recording channels. Additionally, it describes and experimentally demonstrates the programming and self-adaptation techniques embedded in the SoC, assesses the accuracy of the implemented data reduction algorithms and includes in vivo measurements under raw data and feature extraction modes.…”
Section: Introductionmentioning
confidence: 61%
“…The preamplifier is based on the commonly used stage [13][14][15] that works with the capacitive feedback. The reason for this amplifier adaptation lies in its architecture, which is attractive in terms of power dissipation, noise, input dynamic range and simplicity of implementation.…”
Section: Recording Channelmentioning
confidence: 99%
“…Therefore, one needs to propose solutions to both effectively utilize the available power and area budgets, and not to deteriorate other important parameters. There are many prominent examples of systems that present different approaches for recording channels architecture [3,6,[13][14][15][16]. In this paper, the design of the whole recording path is presented with the emphasis on the methods allowing for minimization of both power and area with no negative influence on other system parameters.…”
mentioning
confidence: 99%