A 32-bit microprocessor with high performance bit-map manipulation instructions

This paper describes a 32-bit CISC superscalar microprocessor designed for high-end embedded applications, such as X-window terminals and printers. To realize high performance of processing a series of m e m o r y data such as aflame buffer and a character-string, we have used block-data-transfer and 64-bit processing to improve execution e&iency of multiple-operation instructions of the processor. 16-byte block readlwrite operations through a 32-bit external data bus have accomplished high bandwidth for DRAM access, even in the case of noncacheable regions such as a frame buffer. In executing multiple-operation instructions, 64-bit processing has been realized by operating the dual execution circuits for superscalar executions and a @-bit internal data bus under the control of a very long micro-instruction word. By using these techniques, we have enhanced the frame buffer manipulation performance of this processor 1.5 to 2 times.

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A 32-bit microprocessor with high performance bit-map manipulation instructions

Cited by 7 publications

References 4 publications

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A 32-bit superscalar microprocessor with 64-bit processing and high bandwidth DRAM interface

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