A 3.9 mW Bluetooth Low-Energy Transmitter Using All-Digital PLL-Based Direct FSK Modulation in 55 nm CMOS

Oh, Seong-Jin; Kim, Sung Jin; Ali, İmran; Nga, Truong Thi Kim; Lee, Dongsoo; Pu, YoungGun; Yoo, Sang-Sun; Lee, Minjae; Hwang, Keum Cheol; Yang, Youngoo; Lee, Kang-Yoon

doi:10.1109/tcsi.2018.2803680

Cited by 19 publications

(10 citation statements)

References 24 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…SeongJin Oh et al proposed a FSK transmitter with ADPLL for Bluetooth low energy application [37]. The functional blocks are DPLL components, modulation section and amplifier section.…”

Section: Adpll For Iot and Ble Applicationsmentioning

confidence: 99%

An analysis of ADPLL applications in various fields

Rai¹,

Marimuthu²

2020

IJEECS

View full text Add to dashboard Cite

<span>ADPLL is now an essential component in applications like wireless sensor networks, Internet of things, health care applications, agricultural applications, etc, and also due the requirement of digital implementation by the industries. ADPLL consists of a phase detector, loop filter and digital controlled oscillator. The conventional PLL and digital PLL used for frequency synthesis, clock recovery circuit and synchronization give imprecise performance with respect to reliability, speed, power consumption, noise, locking speed, cost, etc. ADPLL overcomes the drawbacks of conventional PLL and digital PLL. In this paper, different approaches followed in All Digital Phase Locked Loop (ADPLL) for various applications are reviewed and their performance is compared based on components, modulation functions, frequency range, power utilization etc. In addition, an ADPLL with wide tuning range and frequency resolution is designed and implemented using automatic placement and routing, time to digital converter, digital loop filter and ring based oscillator. The ADPLL outputs and the results are analyzed with micro wind tool. The design gives a frequency range from 1.0-5.5GHz with low power consumption and it can also be used for Clock generation applications. </span>

show abstract

“…SeongJin Oh et al proposed a FSK transmitter with ADPLL for Bluetooth low energy application [37]. The functional blocks are DPLL components, modulation section and amplifier section.…”

Section: Adpll For Iot and Ble Applicationsmentioning

confidence: 99%

An analysis of ADPLL applications in various fields

Rai¹,

Marimuthu²

2020

IJEECS

View full text Add to dashboard Cite

show abstract

“…If a higher frequency and flexible frequency adjustment is needed a phase locked loop (PLL) is utilized. Several PLL architectures [5,8] apply an oscillator directly running at radio frequency. The output signal is either sent directly, or amplified by a power amplifier, depending on the desired output power, to the antenna.…”

Section: Fig 1 Edge-combining Power Amplifier With Third-harmonic Ementioning

confidence: 99%

Low-power integrated transmitter design using frequency multiplication techniques

Stadelmayer

Schumacher

Faseth

et al. 2020

Elektrotech. Inftech.

View full text Add to dashboard Cite

This paper proposes an approach to employ frequency multiplication techniques like edge-combining and third harmonic extraction in ultra-low-power integrated transmitter design. The overall power demand of the transmitter is reduced by keeping operating frequency of its components low. For that reason, edge-combining and third harmonic extraction are integrated directly into a switched mode power amplifier. Hence, the radio frequency signal is generated just before it is fed to the antenna. This leads to a reduced power demand of the overall transmitter in comparison to conventional designs where the oscillator and other components are operated directly at the radio frequency. Within this paper we propose an amplifier that generates a 2.4 GHz carrier frequency from a ring oscillator running at a low 200 MHz resulting in a frequency multiplication factor of twelve. The exemplary design is targeted to be used in ultra-low-power short range applications. Hence, our simulations using extracted layout models show that the amplifier provides an output power of approximately -12 dBm at a supply voltage of 0.6 V while consuming 2.4 mW of power fully integrated in a 180 nm 1P6M CMOS process. This demonstrates that the proposed techniques are especially suitable for ultra-low-power transmitter in short range applications. That includes medical and body area network applications.

show abstract

“…Architectures of TX and RX are analog PLL-based on direct modulation instead of IQ up-conversion, and low IF down-conversion, respectively. Although the digital PLL can have the benefit in terms of the area, analog PLL is implemented in this paper to avoid the complexity of additional calibration logics in digital PLL [8]. The proposed TX uses the inductor-less class D type PA for small area and high efficiency [9].…”

Section: Ble Transceiver Architecturementioning

confidence: 99%

“…Since the undesired harmonic tones can degrade spurious spectral emission characteristic of the TX [8], the proposed PA is divided to 16-PA Unit cells, and it applies the Ramping Controller to digitally control output power with ramping when PA is enabled or disabled. The SPDT is designed and integrated for single antenna to be connected to the TX path or the RX path.…”

Section: Building Blocksmentioning

confidence: 99%

A Fully Integrated Bluetooth Low-Energy Transceiver with Integrated Single Pole Double Throw and Power Management Unit for IoT Sensors

Kim

et al. 2019

Sensors

Self Cite

View full text Add to dashboard Cite

This paper presents a low power Gaussian Frequency-Shift Keying (GFSK) transceiver (TRX) with high efficiency power management unit and integrated Single-Pole Double-Throw switch for Bluetooth low energy application. Receiver (RX) is implemented with the RF front-end with an inductor-less low-noise transconductance amplifier and 25% duty-cycle current-driven passive mixers, and low-IF baseband analog with a complex Band Pass Filter(BPF). A transmitter (TX) employs an analog phase-locked loop (PLL) with one-point GFSK modulation and class-D digital Power Amplifier (PA) to reduce current consumption. In the analog PLL, low power Voltage Controlled Oscillator (VCO) is designed and the automatic bandwidth calibration is proposed to optimize bandwidth, settling time, and phase noise by adjusting the charge pump current, VCO gain, and resistor and capacitor values of the loop filter. The Analog Digital Converter (ADC) adopts straightforward architecture to reduce current consumption. The DC-DC buck converter operates by automatically selecting an optimum mode among triple modes, Pulse Width Modulation (PWM), Pulse Frequency Modulation (PFM), and retention, depending on load current. The TRX is implemented using 1P6M 55-nm Complementary Metal–Oxide–Semiconductor (CMOS) technology and the die area is 1.79 mm2. TRX consumes 5 mW on RX and 6 mW on the TX when PA is 0-dBm. Measured sensitivity of RX is −95 dBm at 2.44 GHz. Efficiency of the DC-DC buck converter is over 89% when the load current is higher than 2.5 mA in the PWM mode. Quiescent current consumption is 400 nA from a supply voltage of 3 V in the retention mode.

show abstract

A 3.9 mW Bluetooth Low-Energy Transmitter Using All-Digital PLL-Based Direct FSK Modulation in 55 nm CMOS

Cited by 19 publications

References 24 publications

An analysis of ADPLL applications in various fields

An analysis of ADPLL applications in various fields

Low-power integrated transmitter design using frequency multiplication techniques

A Fully Integrated Bluetooth Low-Energy Transceiver with Integrated Single Pole Double Throw and Power Management Unit for IoT Sensors

Contact Info

Product

Resources

About