A 255 MHz Programmable Gain Amplifier and Low-Pass Filter for Ultra Low Power Impulse-Radio UWB Receivers

IEEE J. Solid-State Circuits

Pezzotta

D'Amico

et al. 2015

Self Cite

In this paper, a 4th-order low-pass continuous-time analog filter is presented, that is implemented with the cascade of two efficient and compact biquadratic cells, realized using the Super-Source-Follower topology. The biquadratic cell uses only two capacitors and four transistors: two transistors for the signal processing and two transistors as current sources for biasing purpose. The 4th-order filter prototype has been integrated in 0.18 µm CMOS technology. For a 33 MHz cut-off frequency, the filter performs 18 dBm-IIP3 for two tones at 2 MHz and 3 MHz, with total current of 770 µA from a single 1.8 V supply voltage.Index Terms-Analog filters, biquadratic cell, CMOS 0.18 m, continuous-time filters, low power, super source follower.

Section: Comparison With the State-of-the-artmentioning

confidence: 99%

A 33 MHz 70 dB-SNR Super-Source-Follower-Based Low-Pass Analog Filter

IEEE J. Solid-State Circuits

Pezzotta

D'Amico

et al. 2015

Self Cite

“…Hence, the equivalent current noise power spectral density i 2 n12 /Δf depends on the specific operating region and it is then given by eq. 1: i The MB 1 -MB 2 noise contribution has been modelled as an equivalent noise current source connected in parallel [6].…”

Section: Afe Input Net Noise Shapingmentioning

confidence: 99%

A 34µW 75dB-dynamic-range CMOS analog front-end for intelligent tyre sensor network

Proceedings of 2013 International Conference on IC Design &Amp; Technology (ICICDT)

Vergine

Sabatini

et al. 2013

A high performance analog front-end for intelligent tyre MEMS accelerometer sensor is presented in this paper. The analog front-end is part of a bigger System-On-Chip totally integrated inside the car tyre, with the aim to interchange real time data with the car central unit. Such system is intrinsically self-biased (a vibration-based scavenger device is used), so that a very low power budget is available for the analog front-end (<100μW). Constant-charge capacitance-to-voltage conversion has been used for readout input acceleration sensing, that allows to reduce power and circuital complexity. At the same time large Signal-To-Noise-Ratio (>75dB over 1Hz÷4kHz bandwidth) has been obtained by a simple in-band noise filtering, while maintaining pass-band frequency response for the acceleration readout input signal. A prototype of the accelerometer analog front-end has been designed in CMOS 0.13μm technology node. The overall readout power consumption is 34μW, from a single 1.2V supply voltage.

“…Those standards have specific requirements including large in-band linearity, low power consumption, and low noise [1], [2], [15], which are in trade-off between them. The filter design technique presented in this paper is suited for the design of filter for wireless applications with good linearity all along the bandwidth (i.e.…”

Section: Introductionmentioning

confidence: 99%

A 4<sup>th</sup>-order low-power diode-C-based filter with 12dBm-IIP3 at the cut-off frequency

D’Amico

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

D’Amico

et al. 2015

Self Cite

This paper presents a 4th-order low-pass continuous-time filter with 21.4 MHz bandwidth. Using a positivefeedback in combination with resistors, this architecture synthesizes two complex conjugate poles. The filter is designed and optimized to feature high-linearity along all filter passband, and, in particular, at the cut-off frequency edge. The filter consumes only 100 µA with 1.8 V voltage supply, and achieves 45 µW/pole power consumption, 300 µVRMS input-referred noise, 21.9 dBm IIP3 with 2-3 MHz input tones and 12 dBm IIP3 near the cut frequency using 19-20 MHz tones.