A 23dBm fully digital transmitter using &amp;#x03A3;&amp;#x0394; and pulse-width modulation for LTE and WLAN applications in 45nm CMOS

Hezar, Rahmi; Ding, Lei; Hur, Jae; Haroun, Baher

doi:10.1109/rfic.2014.6851702

Cited by 11 publications

(13 citation statements)

References 4 publications

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“…Therefore the power consumption for the digital signal processing with the proposed architecture is deemed comparable to the conventional digital transmitters based on bandpass delta-sigma modulation. Digital transmitters [21], [41] with a similar level of complexity and performance for digital processing indicates that the power consumption for the digital signal processing with the proposed transmitter architecture can be justified with output power larger than 100 mW.…”

Section: B Digital Outphasing Transmittermentioning

confidence: 97%

“…Multilevel IF PWM (ML-IFPWM) [19] compromises the high coding efficiency of ML-RFPWM and the low out-of-band emission of ML-RFDSM, but with additional spurious tones that prevent the application of ML-IFPWM on concurrent multiband transmission. Combining baseband delta-sigma (DSM) modulation and baseband PWM [20], [21] shows the advantage of both techniques: a low oversampling rate is allowed while a low out-of-band emission is achieved. When the baseband DSM-PWM signals are up-converted to a carrier frequency using a digital mixer, however, these hybrid DSM-PWM transmitters would generate in-band spurious tones if a concurrent multiband signal is transmitted.…”

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confidence: 99%

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Concurrent Multiband Digital Outphasing Transmitter Architecture Using Multidimensional Power Coding

Chung

Shinjo

et al. 2015

IEEE Trans. Microwave Theory Techn.

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All-digital outphasing transmitter architecture using multidimensional power coding (MDPC) is proposed for non-contiguous concurrent multiband transmission with a high power efficiency. MDPC transforms multiband digital baseband signals into multi-bit low-resolution digital signals that drive switching-mode PAs. A prototype digital outphasing transmitter consists of two 1-GHz bandwidth GaN Class-D PAs and a Chireix power combiner. The two GaN PAs are driven by bipolar RF PWM signals, which are transformed from a concurrent dual-band LTE signal by MDPC. The dual-band LTE signal with 15-MHz aggregate channel bandwidth at 240 MHz and 500 MHz frequency band is transmitted with -30 dBc and -37 dBc out-of-band emissions, respectively. Digital outphasing achieves more than two times higher coding efficiency than conventional concurrent dual-band digital transmitters with the same PAs in Class-S operation. Measured power coding efficiencies of 35.4% and 47.1% are observed with outphasing bipolar and 3-level RF PWM signals respectively, which are encoded from the dual-band LTE signal. IEEE MTT Transaction, PA Special IssueThis work may not be copied or reproduced in whole or in part for any commercial purpose. Permission to copy in whole or in part without payment of fee is granted for nonprofit educational and research purposes provided that all such whole or partial copies include the following: a notice that such copying is by permission of Mitsubishi Electric Research Laboratories, Inc.; an acknowledgment of the authors and individual contributions to the work; and all applicable portions of the copyright notice. Copying, reproduction, or republishing for any other purpose shall require a license with payment of fee to Mitsubishi Electric Research Laboratories, Inc. All rights reserved. Index Terms-Class-S power amplifier, concurrent dual-band transmitter, inter-band carrier aggregation, power coding, multiband delta-sigma modulator, outphasing.

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Section: B Digital Outphasing Transmittermentioning

confidence: 97%

mentioning

confidence: 99%

Concurrent Multiband Digital Outphasing Transmitter Architecture Using Multidimensional Power Coding

Chung

Shinjo

et al. 2015

IEEE Trans. Microwave Theory Techn.

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“…In a QM EPWM architecture, a trilevel DSM is used to represent the "off" state which presents the burst RF signal from achieving high efficiency [9]- [10]. This architecture requires two PAs, one for positive pulses and one for negative pulses, with a combiner after the PAs [9]- [10].…”

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

“…This architecture requires two PAs, one for positive pulses and one for negative pulses, with a combiner after the PAs [9]- [10]. The H-bridge configuration with a transformer as a combiner [7], [10] is a representative configuration for this method. However, in this configuration the chip area and power loss are large owing to the existence of a transformer [13] which must be connected with a single-ended device such as a microstrip antenna.…”

Section: Introductionmentioning

confidence: 99%

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Optimization of DSM Sampling Frequency and Interleaving Frequency for Bilevel Quadrature-Modulation EPWM Transmitter

Noda

Umeda

Kozawa

2016

Journal of Signal Processing

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We previously proposed a bilevel quadrature-modulation (QM) envelope-pulse-width-modulation (EPWM) transmitter using half a side of a trilevel EPWM architecture. However, the optimum relationship between the  modulation (DSM) sampling frequency (f s ), the interleaving frequency (f i ) and the carrier frequency (f c ) for a bilevel QM EPWM transmitter has not been investigated. This paper presents this optimum relationship, with the error vector magnitude (EVM) and the coding efficiency (CE) as figures of merit (FOMs).

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Concept for Continuously Tunable Output Filters for Digital Transmitter Architectures

et al. 2019

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This paper presents a novel output filter approach for continuously frequency-tunable digital power amplifiers, suitable for future seamless and band-less applications in 5G, e.g. for cognitive radios (CR). The presented tunable output filter is based on a multi-bandstop lowpass response to regenerate the original microwave signal at the output of the digital amplifier stage by suppressing unwanted frequency components. Compared to conventional tunable bandpass solutions, it offers higher tunability, higher linearity, good power handling capability and moderate losses especially around the carrier frequency. A tunable power amplifier (PA) demonstrator consisting of a 4-stage digital GaN PA MMIC and the novel tunable filter, is designed and fabricated for a carrier frequency range from 1 GHz to 3 GHz. Tunability is achieved by using commercial barium strontium titanate (BST) varactors. Small signal measurements were performed to evaluate tunability and suppression capabilities of the novel filter structure, which reveal a frequency tunability of 67 % with a suppression level of at least 13 dB for the undesired frequency components. The proposed filter structure exhibits a linearity over the tuning range with an OIP3 between 66 dBm to 70 dBm and high power handling capability. Finally, the performance analysis of the tunable PA demonstrator shows an peak efficiency of 70 %. Due to frequency limitations of the used PA stage, the efficiency slowly degrades to 20 % at the upper frequency band edge. Simultaneously, the output power varies between 27 dBm to 31 dBm.INDEX TERMS Tunable circuits and devices, microwave power amplifiers, digital amplifiers, GaN, tunable filters, BST.

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A 23dBm fully digital transmitter using ΣΔ and pulse-width modulation for LTE and WLAN applications in 45nm CMOS

Cited by 11 publications

References 4 publications

Concurrent Multiband Digital Outphasing Transmitter Architecture Using Multidimensional Power Coding

Concurrent Multiband Digital Outphasing Transmitter Architecture Using Multidimensional Power Coding

Optimization of DSM Sampling Frequency and Interleaving Frequency for Bilevel Quadrature-Modulation EPWM Transmitter

Concept for Continuously Tunable Output Filters for Digital Transmitter Architectures

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