A 220-mV input, 8.6 step-up voltage conversion ratio, 10.45-μW output power, fully integrated switched-capacitor converter for energy harvesting

Intaschi, Luca; Bruschi, P.; Iannaccone, Giuseppe; Dalena, Francesco

doi:10.1109/cicc.2017.7993623

Cited by 13 publications

(9 citation statements)

References 10 publications

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“…The resulting r vector, the vector used in eq. 23 which relates switch on-resistance to 1 f sw C out is Relating C oss to the R on of the switch using eq. 25 and substituting in the expression for R on , k switching can be found…”

Section: A 1:5 Sc Converter Design Examplementioning

confidence: 99%

“…Switched Capacitor (SC) converters have been investigated as solutions in a number of space constrained battery-powered and power harvesting applications [1], [2]. They have been increasingly used in novel multi-stage power management systems [3] and as parts of emerging hybrid converter topologies [4], [5].…”

Section: Introductionmentioning

confidence: 99%

“…Now k cond and k switching must be found. Assuming there are two time constants in one half-switching cycle of the SC, k cond can be found by factoring out1 C out f sw from R out . This gives…”

mentioning

confidence: 99%

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Design Oriented Analysis of Switched Capacitor DC–DC Converters

McRae

Prodić

2020

IEEE Open J. Power Electron.

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A novel approach to the design of switched capacitor (SC) converters is presented in this article. By recognizing the relationship between three design parameters in SC converters, namely capacitance, switching frequency, and switch on-resistance, this work is able to align the design method of SC more closely with conventional power converters. Using the charge-multiplier framework for design, capacitor sizes can be related to one another and subsequently to output voltage ripple, a key design parameter of converters. Optimization tools are used to take the equations developed for hand calculation and enable a more broad generalization of how SC converters can be designed. Typically it is thought that the larger the voltage ripple in SC converters is, the less efficient the converter is. However, this design method shows that this is not necessarily the case. Experimental prototypes are designed with these tools to show the validity of the proposed method.

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Section: A 1:5 Sc Converter Design Examplementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Design Oriented Analysis of Switched Capacitor DC–DC Converters

McRae

Prodić

2020

IEEE Open J. Power Electron.

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“…It can be observed that effective voltage V EFF in relation to R ON acts as argument of exponential function located in denominator, which implicates the substantial sensitivity to change of this quantity. In order to overcome this issue, many techniques such as dynamic control, feed-forward biasing of the bulk electrode, multistage topology, implementation of charge transfer switches (CTS) parallel with pass gate switches (PGS) or backward control of the previous stage by body electrode voltage can be included in the low-voltage CPs design [11][12][13][14].…”

Section: Design Procedures Of Bd Charge Pumpmentioning

confidence: 99%

Ultra-Low-Voltage IC Design Methods

Arbet¹,

Nagy²,

Stopjaková³

2020

Integrated Circuits/Microchips

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The emerging nanoscale technologies inherently offer transistors working with low voltage levels and are optimized for low-power operation. However, these technologies lack quality electronic components vital for reliable analog and/or mixed-signal design (e.g., resistor, capacitor, etc.) as they are predominantly used in high-performance digital designs. Moreover, the voltage headroom, ESD properties, the maximum current densities, parasitic effects, process fluctuations, aging effects, and many other parameters are superior in verified-by-time CMOS processes using planar transistors. This is the main reason, why low-voltage, low-power high-performance analog and mixed-signal circuits are still being designed in mature process nodes. In the proposed chapter, we bring an overview of main challenges and design techniques effectively applicable for ultra-low-voltage and low-power analog integrated circuits in nanoscale technologies. New design challenges and limitations linked with a low value of the supply voltage, the process fluctuation, device mismatch, and other effects are discussed. In the later part of the chapter, conventional and unconventional design techniques (bulk-driven approach, floating-gate, dynamic threshold, etc.) to design analog integrated circuits towards ultra-low-voltage systems and applications are described. Examples of ultra-low-voltage analog ICs blocks (an operational amplifier, a voltage comparator, a charge pump, etc.) designed in a standard CMOS technology using the unconventional design approach are presented.

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“…The driver generates a non-overlapping outputs under the condition of non-overlapping control signals (Cl k c and nCl k c ). Design utilizes only two capacitors and charging is accomplished directly by the supply voltage, compared to three capacitors (two capacitors version is also available) with lower driving range of ≈ −V SUPP ÷ V SUPP and charging supported by the clock signal presented in [46]. More details together with the propagation delay measurement of the proposed driver can be found in [45] and [47] respectively.…”

Section: Charge Pump For Self-powered Systemsmentioning

confidence: 99%

Ultra-Low Voltage Analog IC Design: Challenges, Methods and Examples

Stopjaková¹,

Rakús²,

Kovac³

et al. 2018

RADIOENGINEERING

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The paper brings an overview of main challenges and design techniques effectively applicable for ultra-low voltage analog integrated circuits in nanoscale technologies. New design challenges linked with a low value of the supply voltage and the process fluctuation in nanotechnologies, such as device models, robustness to process variation, device mismatch and others are discussed firstly. Then, design techniques and approaches to analog integrated circuits towards (ultra) low-voltage systems and applications are described. Finally, examples of basic building blocks of ultra-low voltage analog ICs designed in standard CMOS technology using such design techniques are presented. Finally, the developed circuits are compared to the state-of-the-art solutions in terms of the main parameters and features.

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A 220-mV input, 8.6 step-up voltage conversion ratio, 10.45-μW output power, fully integrated switched-capacitor converter for energy harvesting

Cited by 13 publications

References 10 publications

Design Oriented Analysis of Switched Capacitor DC–DC Converters

Design Oriented Analysis of Switched Capacitor DC–DC Converters

Ultra-Low-Voltage IC Design Methods

Ultra-Low Voltage Analog IC Design: Challenges, Methods and Examples

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