A 22-30GHz balanced SiGe BiCMOS frequency doubler with 47dBc suppression and low input drive power

Sun, Jingru; Liu, Qing; Suh, Yong-Ju; Shibata, Takayuki; Yoshimasu, Toshihiko

doi:10.1109/apmc.2009.5385432

Cited by 5 publications

(4 citation statements)

References 9 publications

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“…It can be noted that the CMOS-based technology shows the least conversion loss. However, the CMOS circuits use an intermittent amplifier stage to boost up the harmonic power level and suppress other undesired frequencies [ 43 , 44 ]. The Schottky diode, such as HSMS2850 in [ 45 ] and BAT1503 in [ 30 ], showed a decent conversion loss up to input power as low as −10 dBm.…”

Section: Harmonic Generationmentioning

confidence: 99%

“…As both the FETs are biased using the same DC current, the current reused frequency multiplier configuration consumes less power. Another popular architecture is Gilbert cell-based configuration, where nonlinearity from the FETs are utilized for harmonic generation [ 43 ]. Although power consumption rises, avoidance of inductors helps in realizing a smaller cell size for Gilbert cell-based multipliers.…”

Section: Harmonic Generationmentioning

confidence: 99%

“…BiCMOS [43] High Good Good Weak (due to high power consumption) CMOS [44] High Good Good Weak (due to high power consumption) CMOS logic [39] High Good Good Weak (due to high power consumption) FET [42] High Good Good Weak (due to high power consumption) Schottky [23] Low Bad Bad Moderate (due to complicated switching control) Schottky [29] Low Bad Bad Moderate (due to complicated switching control) Schottky [45] Low Bad Bad Moderate (due to complicated switching control) CMOS varactor [38] Low Medium Good Strong (due to all advantages)…”

Section: Switching Controlmentioning

confidence: 99%

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Recent Advances and Applications of Passive Harmonic RFID Systems: A Review

2021

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Harmonic Radio Frequency Identification (RFID) systems have attracted significant interest over the last decade as it provides many benefits over the conventional RFID systems. Harmonic RFID is desired over conventional RFID systems due to reduced self-jamming, location accuracy from dual frequency, and higher phase noise immunity. In a harmonic RFID system, the tag receives instructions from the reader at an RF carrier frequency and replies back at the harmonic of the RF frequency. A nonlinear element consuming very low power at the tag is required to generate the harmonic carrier for the battery-less system. In this review article, a detailed contrast between conventional and harmonic RFID systems is presented. This is followed by different circuit design techniques to generate harmonics and integration techniques to form a fully operable passive harmonic RFID tag. Also, a wide range of applications, especially sensor integration with harmonic RFID’s, along with the future trends are presented.

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Section: Harmonic Generationmentioning

confidence: 99%

Section: Harmonic Generationmentioning

confidence: 99%

Section: Switching Controlmentioning

confidence: 99%

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Recent Advances and Applications of Passive Harmonic RFID Systems: A Review

2021

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“…The transformer balun can divide an input single‐ended signal into differential signals, and the transformer balun has three capacitors for power transfer. This transformer balun, which has a compact size compared to the Marchand balun , is designed using electromagnetic (EM) simulation that replicated accurate environment setup as used 65 nm CMOS process. Furthermore, EM simulation is used to design entire circuit for more accurate fabrication as simulation results, except for NMOSs and capacitors.…”

Section: Circuit Designmentioning

confidence: 99%

Miniaturized X/Ku-band frequency doubler with high gain and optimized doubling-core efficiency in 65 NM CMOS technology

Kim

2017

Microw. Opt. Technol. Lett.

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In this paper, a miniaturized X/Ku‐band frequency doubler with a two stage amplifier using balanced topology is demonstrated. The circuit is fabricated using 65 nm CMOS technology and designed to operate from 11.6 to 13 GHz. The doubler is designed with an amplifier to maximize the efficiency of the doubling core and to ensure low input power. The transformer balun was conjoined as the input balun in the frequency doubler and the inductor in the amplifier. Therefore, the transformer balun reduces the circuit size. The frequency doubler exhibits a conversion gain of 13.4 dB at a 6 GHz input frequency and −15 dBm input power. The fundamental rejection is 30.6 dB at a 6 GHz input frequency. The proposed frequency doubler consumes power of 18 mW and occupies an area of 0.69 × 0.41 mm2 © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:1265–1267, 2017

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