Abstract:A frequency tripler designed for V-band signal generation has been implemented by using CMOS 0.18 µm process. Based on the circuit topology of differential binary phase shift keying (BPSK) modulator, a function of frequency triplication can be performed under the operation modes of class-AB and class-C when choosing the proper biases on the NMOS devices. For achieving a large 60 GHz output signal, the compact impedance matching network based on the imbalanced transmission-line is also used to the output port. … Show more
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