2019 IEEE Asian Solid-State Circuits Conference (A-Sscc) 2019
DOI: 10.1109/a-sscc47793.2019.9056979
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A 20-GHz Ultra-Low-Power LNA Using gm-Boosted and Current-Reuse Techniques in 65-nm CMOS for Satellite Communication Terminals

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Cited by 5 publications
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“…The impedance of L4 is adequately large to provide a high impedance path to block the signal at the desired bandwidth, while L3 and C5 of M2 provide a low impedance path. Therefore, the input signal can be amplified twice under this technique for higher gain, and it saves half power consumption compared with the conventional cascaded two-stage CS AMP [38]. A narrow band resonance circuit of L3, C5 and shunt inductor L5, L6 peaks at the edge of the desired band to achieve a wider bandwidth, respectively.…”
Section: Amplifiersmentioning
confidence: 99%
“…The impedance of L4 is adequately large to provide a high impedance path to block the signal at the desired bandwidth, while L3 and C5 of M2 provide a low impedance path. Therefore, the input signal can be amplified twice under this technique for higher gain, and it saves half power consumption compared with the conventional cascaded two-stage CS AMP [38]. A narrow band resonance circuit of L3, C5 and shunt inductor L5, L6 peaks at the edge of the desired band to achieve a wider bandwidth, respectively.…”
Section: Amplifiersmentioning
confidence: 99%