A 2.79-mW 0.5%-THD CMOS current driver IC for portable electrical impedance tomography system

Jang, Jongsoo; Kim, Minseo; Bae, Joonsung; Yoo, Hoi‐Jun

doi:10.1109/asscc.2017.8240237

Cited by 11 publications

(14 citation statements)

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“…More specifically, the number of the sampling points per one sinusoid period increases, requiring a larger memory to store a larger LUT [52]. To reduce the LUT size, adaptive quantizing techniques according to the signal scale can be used [53]- [58]. For example, in [53]- [57], when the current level at a certain sampling point is less than 2/3 of the peak current of the sinusoid, the quantization level is rounded off to the nearest multiple of two of the unit current cell.…”

Section: A Dac-based Sinusoidmentioning

confidence: 99%

“…As a result, the hardware complexity, including the LUT size, is reduced while keeping the low order harmonics less than the magnitude of the 63th harmonic, which is the main harmonic caused by the sampling operation. Similarly in [58], the linearity is further improved by a finer rounded-off. Although the complexity caused by high OSR can be mitigated to some extent by these methods [53]- [58], the maximum f SG is still limited by the required high clock speed for such high OSR.…”

Section: A Dac-based Sinusoidmentioning

confidence: 99%

“…Similarly in [58], the linearity is further improved by a finer rounded-off. Although the complexity caused by high OSR can be mitigated to some extent by these methods [53]- [58], the maximum f SG is still limited by the required high clock speed for such high OSR.…”

Section: A Dac-based Sinusoidmentioning

confidence: 99%

“…But, most circuits for the waveform generation and linearity enhancement operate in the voltage domain, so it cannot be directly used for such merged structures. Instead, other types of DACs, oscillators, or circuits have been demonstrated with separate current drivers [5], [28], [38], [39], [47], [58], [59], [61], [62], [73], [84]- [86], [89], [101], [112].…”

Section: A Open-loop Current Driversmentioning

confidence: 99%

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On-Chip Sinusoidal Signal Generators for Electrical Impedance Spectroscopy: Methodological Review

Kweon¹,

Rafi

Cheon

et al. 2022

IEEE Trans. Biomed. Circuits Syst.

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This paper reviews architectures and circuit implementations of on-chip sinusoidal signal generators (SSGs) for electrical impedance spectroscopy (EIS) applications. In recent years, there have been increasing interests in on-chip EIS systems, which measure a target material's impedance spectrum over a frequency range. The on-chip implementation allows EIS systems to have low power and small form factor, enabling various biomedical applications. One of the key building blocks of on-chip EIS systems is on-chip SSG, which determines the frequency range and the analysis precision of the whole EIS system. On-chip SSGs are generally required to have high linearity, wide frequency range, and high power and area efficiency. They are typically composed of three stages in general: waveform generation, linearity enhancement, and current injection. First, a sinusoidal waveform should be generated in SSGs. The generated waveform's frequency should be accurately adjustable over a wide range. The firstly generated waveform may not be perfectly linear, including unwanted harmonics. In the following linearity-enhancement step, these harmonics are attenuated by using filters typically. As the linearity of the waveform is improved, the precision of the EIS system gets ensured. Lastly, the filtered voltage waveform is now converted to a current by a current driver. Then, the current sinusoidal signal is injected into the target impedance. This review discusses the principles, advantages, and disadvantages of various techniques applied to each step in state-of-the-art on-chip SSGs. In addition, state-of-the-art designs are compared and summarized.

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Section: A Dac-based Sinusoidmentioning

confidence: 99%

Section: A Dac-based Sinusoidmentioning

confidence: 99%

Section: A Dac-based Sinusoidmentioning

confidence: 99%

Section: A Open-loop Current Driversmentioning

confidence: 99%

See 2 more Smart Citations

On-Chip Sinusoidal Signal Generators for Electrical Impedance Spectroscopy: Methodological Review

Kweon¹,

Rafi

Cheon

et al. 2022

IEEE Trans. Biomed. Circuits Syst.

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show abstract

“…Some research groups are investigating new schemes to improve the bandwidth by using multiple current injectors and voltmeters in parallel [372]. Other approaches employ active electrodes to mitigate the effects of parasitic capacitances [375,376]. The collaboration of technical experts, mathematicians, and clinicians will be necessary to make a trade-off between the hardware and software complexity and the precision performance.…”

Section: Future Challenges Of Bioimpedancementioning

confidence: 99%

Fundamentals, Recent Advances, and Future Challenges in Bioimpedance Devices for Healthcare Applications

2019

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This work develops a thorough review of bioimpedance systems for healthcare applications. The basis and fundamentals of bioimpedance measurements are described covering issues ranging from the hardware diagrams to the configurations and designs of the electrodes and from the mathematical models that describe the frequency behavior of the bioimpedance to the sources of noise and artifacts. Bioimpedance applications such as body composition assessment, impedance cardiography (ICG), transthoracic impedance pneumography, electrical impedance tomography (EIT), and skin conductance are described and analyzed. A breakdown of recent advances and future challenges of bioimpedance is also performed, addressing topics such as transducers for biosensors and Lab-on-Chip technology, measurements in implantable systems, characterization of new parameters and substances, and novel bioimpedance applications.

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A 0.05%–0.08% THD, 762.9 Hz–10 MHz direct digital frequency synthesizer using a reconfigurable DAC for electrochemical impedance spectroscopy measurements

Farouk,

Dessouky,

Naguib

2024

Circuit Theory & Apps

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SummaryA wide‐range direct digital frequency synthesizer (DDS) is considered an essential component that is used in measuring electrochemical impedance spectroscopy (EIS). Since it depends on exciting the electrochemical sensor by a pure sine wave, total harmonic distortion (THD) is considered a challenging specification for an accurate EIS measurement. This paper introduces a complete system and circuit designs of a wide range DDS with a comprehensive system model using MATLAB environment. In addition, it presents the usage of a reconfigurable digital‐to‐analog converter (DAC) on the circuit level that is used either as a 4‐bit delta‐sigma ( ) DAC or an 8‐bit binary‐weighted DAC for both low‐ and high‐frequency ranges, respectively. The designed DDS generates an output frequency range from 762.933 Hz to 10 MHz using a physical 8‐bit DAC. The circuits are simulated using 0.18 μm CMOS technology. The designed DDS system achieves THD less than 0.05% with superior free dynamic range (SFDR) 66 dBc for low‐frequency range and 0.08% with SFDR 62 dBc for high‐frequency range. The DDS circuits occupy an area of 400 × 800 μm. The whole system consumes a 2.5 mW power consumption from a 1.8 V supply.

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A 2.79-mW 0.5%-THD CMOS current driver IC for portable electrical impedance tomography system

Cited by 11 publications

References 11 publications

On-Chip Sinusoidal Signal Generators for Electrical Impedance Spectroscopy: Methodological Review

On-Chip Sinusoidal Signal Generators for Electrical Impedance Spectroscopy: Methodological Review

Fundamentals, Recent Advances, and Future Challenges in Bioimpedance Devices for Healthcare Applications

A 0.05%–0.08% THD, 762.9 Hz–10 MHz direct digital frequency synthesizer using a reconfigurable DAC for electrochemical impedance spectroscopy measurements

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