A 2.5 GHz low phase noise oscillator design in 65nm CMOS technology with reduced current consumption

Dossou, S.; Joblot, S.; Petit, D.; Ancey, P.

doi:10.1109/edssc.2008.4760724

2008 IEEE International Conference on Electron Devices and Solid-State Circuits 2008

DOI: 10.1109/edssc.2008.4760724

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A 2.5 GHz low phase noise oscillator design in 65nm CMOS technology with reduced current consumption

S. Dossou

S. Joblot

D. Petit

et al.

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A 2.5 GHz low phase noise oscillator design in 65nm CMOS technology with reduced current consumption

Cited by 0 publications

References 14 publications

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