A 1V buck converter IC with hybrid current-mode control and a charge-pump DAC

Abstract

This paper presents an integrated dc-dc converter with an output voltage of 1 V for portable applications. A hybrid peak current-mode control-scheme is demonstrated, where the voltage-loop compensation is achieved in the digital domain, while the current-regulation loop has a more traditional analog implementation. The main contribution of this work is the novel DAC architecture, which was developed specifically to achieve fast transient-response without needing clock frequencies beyond fs, or expensive signal processing. Unlike the previous approach, based on an adaptive ΔΣ DAC, the charge-pump (CP) DAC is capable of rapidly increasing the current-command in a singlecycle during load-steps. In addition to a low steady-state currentconsumption of 3 μA, the CP-DAC has a guaranteed monotonic transfer characteristic and simplifies the overall system architecture. The resulting system solution achieves dynamic response comparable to state-of-the-art analog current-mode solutions, without using a power-hungry controller, or quantizing the inductor current. A custom IC, which was fabricated in a 0.18 μm CMOS process with 5 V compatible transistors, achieves a response-time of 4 μs at fs = 3 MHz and Vout = 1 V, for a 200 mA load-step. The active area of the controller is only 0.077 mm 2 , and the total controller current-draw, which is heavily dominated by the on-chip senseFET current-sensor, is below 0.5 % of the load current at Iout= 50 mA.

Digitally controlled low-power DC-DC converter with segmented output stage and gate charge based instantaneous efficiency optimization

“…This hybrid approach results in more power and area efficient implementation of the controller. It has been shown in previous publications [9][10][11][13][14] that all the digital blocks in controller of Fig.1 can be implemented on chip with low power consumption and small area. The architecture shown in Fig.1 has been modified to allow implementation of efficiency optimization techniques based on segmentation and gate-voltage swing scaling.…”

“…The dominant sources of losses in high frequency SMPS are gate-drive and conduction losses associated with power MOSFETs [1][2][11][12][13]. The conduction loss can be described with the following equation [2,7] …”

Analysis and design of a highly efficient and versatile DC-DC converter

“…Since buck converter using single-end inductor circuit is most widely used in the mobile phone application [6,[38][39][40][41], this research work will target this type of converter to explain and demonstrate the concepts.…”