A 18MS/s 76dB SNDR 93dB SFDR CT ΔΣ Modulator with Input Voltage Tracking 2nd-Order GmVC Filter and Shared FIR DAC in 22nm FDSOI CMOS

Runge, Marcel; Edler, Julius; Kaiser, Tobias; Gerfers, Friedel

doi:10.1109/cicc51472.2021.9431404

Cited by 1 publication

(1 citation statement)

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“…Moreover, almost exclusively wideband ADC are implemented with CT loop filters. The CT loop filter not only offers better drivability due to its resistive or G m -based input [135] but also features implicit signal filtering; often reduced to an implicit anti-aliasing filter. It also allows the attenuation of out-of-band interference signals [136], which can be even enhanced by embedding analog [137] or mixed-signal filtering [138].…”

Section: ) Techniques For Wideband Adcsmentioning

confidence: 99%

Design Techniques for Energy-Efficient Analog-to-Digital Converters

Jang,

Tang,

Lim

et al. 2023

IEEE Open J. Solid-State Circuits Soc.

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The energy efficiency of analog-to-digital converters (ADCs) has improved steadily over the past 40 years, with the best reported ADC efficiency improving by nearly six orders of magnitude over the same period. The best figure-of-merit (FoM) is achieved with a limited class of ADC in terms of resolution and speed, but the coverage of the best FoM ADC has been expended. Many ADCs with the record FoM open up new applications and often incorporate multiple combinations of architectural and circuit innovations. It would be very interesting to follow a path of relentless optimization that could be useful to further expand the operating bandwidth of energy-efficient ADCs. To help along this path, this review article discusses the design techniques that focus on optimizing energy efficiency, involving successive approximation, pipelining, noise-shaping, and continuous-time operation.INDEX TERMS Analog-to-digital converter (ADC), continuous-time (CT), delta-sigma modulation, energy efficient, low power, noise-shaping (NS), pipelining, successive approximation.

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