A 16b Oversampling CODEC With Filtering DSP

Okamoto, Takuya; Maruyama, Y.; Hinooka, K.; Yukawa, A.

doi:10.1109/isscc.1991.689070

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1992

1993

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Cited by 4 publications

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“…The first approach is to increase oversampling ratio based on a single bit 2nd order delta-sigma modulator[l]- [3], A delta-sigma modulator with a larger oversampling ratio is nore advantageous to simplify continuous filters for aliased and out-of-band noise suppressions arising at an ADC and a DAC, respectively. However, it needs higher speed components and more power consump¬ tion in result.…”

Section: Introductionmentioning

confidence: 99%

A Stable 4th-Order Delta-Sigma Modulator with an FIR predictor

Okanoto

Maruyama

Yukawa

1992

ESSCIRC '92: Eighteenth European Solid-State Circuits Conference

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AbstrwtA novel approach for a stable high-order delta-sigma modulator is presented. The modulator provides 16 bit resolution at 20kHz bandwidth using 4th~order noise shaping structure at an oversampling ratio of 64. The modulation loop is completely stabilized by an FIR prediction technique. The architecture inherently has less sensitivity to com¬ ponent mismatch. The total hardware is much the same as the noise shaping integrators.

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Section: Introductionmentioning

confidence: 99%