A 14-bit current-mode /spl Sigma//spl Delta/ DAC based upon rotated data weighted averaging

Radke, R. E.; Eshraghi, A.; Fiez, T.S.

doi:10.1109/4.859496

Cited by 61 publications

(30 citation statements)

References 13 publications

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“…Offset technique has a unique advantage over dithering [6], rotated DWA (RDWA) [9], and randomized DWA of this work: most of the mismatch noise energy is contained in the tones outside the baseband. This keeps the baseband clean and improves SNR.…”

Section: Offset Techniquementioning

confidence: 99%

“…The technique is successful in reducing tonal behavior. However, the SNR could degrade significantly if more randomization is used [9]. The amount of hardware is a concern too.…”

Section: Introductionmentioning

confidence: 98%

“…Although it can reduce tonal effect for low-level signals, but because some DAC units do not participate in the DWA process, it will have a DAC mismatch problem for higher input signals. Another recent technique is Rotational DWA [9]. This technique switches randomly between different patterns for unit selection.…”

Section: Introductionmentioning

confidence: 99%

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Techniques for preventing tonal behavior of data weighted averaging algorithm in /spl Sigma/#x03A3;-/spl Delta/#x0394; modulators

Vadipour

2000

IEEE Trans. Circuits Syst. II

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Two techniques for prevention of in-band tones in DWA mismatch noise shaping algorithm are presented. "Offset technique" moves in-band tones away from baseband, improving SNR by 10 dB, and attenuates maximum in-band tone by as much as 25 dB. "Randomized DWA" is a combination of simultaneous randomization and DWA, which attenuates tonal behavior in all frequencies, preventing aliasing of tones or tone shifting for any arbitrary input signal.Index Terms-A/D and D/A converters, data-weighted averaging, sigma-delta modulators.

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Section: Offset Techniquementioning

confidence: 99%

“…The technique is successful in reducing tonal behavior. However, the SNR could degrade significantly if more randomization is used [9]. The amount of hardware is a concern too.…”

Section: Introductionmentioning

confidence: 98%

See 1 more Smart Citation

Techniques for preventing tonal behavior of data weighted averaging algorithm in /spl Sigma/#x03A3;-/spl Delta/#x0394; modulators

Vadipour

2000

IEEE Trans. Circuits Syst. II

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“…The input control word to the digital block is a 13-bit fixed-point digital word with an 8-bit integer part and a 5-bit fractional part. In the digital block, the 8-bit integer part is converted to a 256-bit thermometer code, where a dynamic element matching (DEM) scheme [9] is also implemented to improve the DFC linearity of the DCO. The fractional part is fed to a digital RD-modulator (SDM), which is clocked with the high-frequency signal CKVD4 derived from a DCO output, CKV, using a divide-by-4 circuit.…”

Section: Digital Logic Blockmentioning

confidence: 99%

A digitally controlled 2.4-GHz oscillator in 65-nm CMOS

Xu¹,

Lindfors²,

Stadius³

et al. 2008

Analog Integr Circ Sig Process

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This article presents a 2.4-GHz digitally controlled oscillator (DCO) for the ISM band. The circuit is designed using a 65-nm CMOS technology with an operating voltage of 1.2 V. The DCO comprises an LC oscillator core and the digital interface logic. The measured total frequency range is from 2.26 to 3.04 GHz. Its frequency quantization step is approximately 20 kHz, and using a digital RD-modulator (SDM), its effective frequency resolution is better than 1 kHz. Current consumption of the oscillator core is tunable through a 6-bit digital word. The measured phase noise is -122 dBc/Hz at 1-MHz offset frequency with 4.8-mA current consumption.

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“…The DEM method has been used by many researchers to improve the performance of DACs [6][7][8][9][10]. Most researchers use these DACs on Delta-Sigma converters when high linearity is required.…”

Section: Introductionmentioning

confidence: 99%

Testing high resolution ADCs using deterministic dynamic element matching

Olleta

Jiang

Chen

et al.

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

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Dynamic element matching (DEM) is an effective approach to achieving good average performance in the presence of major mismatch in matching-critical circuits. This paper presents a deterministic DEM (DDEM) strategy for ADC testing that offers substantial reductions in testing cost.The approach is mathematically formulated and validated with simulation results that show the number of test vectors needed is comparable to what are currently used with standard code density linearity testing. It is demonstrated that the DDEM method can be used to accurately test ADCs with linearity that far exceeds that of the DAC used as a signal generator. This technique offers potential for use in both production test and BIST environments where high linearity devices are difficult to test and characterize.

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A 14-bit current-mode /spl Sigma//spl Delta/ DAC based upon rotated data weighted averaging

Cited by 61 publications

References 13 publications

Techniques for preventing tonal behavior of data weighted averaging algorithm in /spl Sigma/#x03A3;-/spl Delta/#x0394; modulators

Techniques for preventing tonal behavior of data weighted averaging algorithm in /spl Sigma/#x03A3;-/spl Delta/#x0394; modulators

A digitally controlled 2.4-GHz oscillator in 65-nm CMOS

Testing high resolution ADCs using deterministic dynamic element matching

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