A 118 dB PSRR, 0.00067% (-103.5 dB) THD+N and 3.1 W Fully Differential Class-D Audio Amplifier With PWM Common Mode Control

Wang, Wen-Chieh; Lin, Yu‐Hsin

doi:10.1109/jssc.2016.2591828

Cited by 19 publications

(7 citation statements)

References 17 publications

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“…The PSRR is plotted vs. Δ𝑡𝑡 for 𝑓𝑓 𝐶𝐶𝐶𝐶 = 100 kHz and 𝑓𝑓 𝐶𝐶𝐶𝐶 = 105 kHz respectively. When 𝑓𝑓 𝐶𝐶𝐶𝐶 = 105 kHz, the PSRR suffers as predicted by equation (7), whereas when 𝑓𝑓 𝐶𝐶𝐶𝐶 = 100 kHz, the PSRR remains high regardless of Δ𝑡𝑡.…”

Section: A Impact Of Im On Psrrmentioning

confidence: 85%

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A Chopper Class-D Amplifier for PSRR Improvement Over the Entire Audio Band

Zhang

Rozsa

Berkhout³

et al. 2022

IEEE J. Solid-State Circuits

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The power supply rejection ratio (PSRR) of conventional differential closed-loop Class-D amplifiers is limited by the feedback and input resistor mismatch and finite CMRR of the OTA in the 1 st integrator. This paper presents a 14.4 V Class-D amplifier employing chopping to tackle the mismatch, thereby improving the PSRR. However, chopping-induced intermodulation within a PWM-based class-D amplifier can severely degrade PSRR and linearity. Techniques to mitigate such intermodulation are proposed and analyzed. To chop the 14.4V PWM output signal, a high-voltage (HV) chopper employing DMOS transistors is developed. Its timing is carefully aligned with that of the low-voltage (LV) choppers to avoid further linearity degradation. The prototype, fabricated in a 180 nm BCD process, achieves a PSRR of >110 dB at low frequencies, which remains above 79 dB up to 20 kHz. It achieves a THD of −109.1 dB and can deliver a maximum of 14 W into an 8-Ω load with 93% efficiency while occupying a silicon area of 5 mm 2 . Index Terms-Audio power amplifier, class-D amplifier, intermodulation, power supply rejection ratio (PSRR), total harmonic distortion (THD).C Fig. 1. Conventional closed-loop Class-D amplifier in a BTL configuration and sources of limited PSRR: feedback resistor mismatch, input resistor mismatch, and finite CMRR of the OTA in the 1 st integrator.

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Section: A Impact Of Im On Psrrmentioning

confidence: 85%

“…In [7,8], this problem is addressed by closed-loop control of the Class-D amplifier's output common mode, which significantly improves the PSRR at low frequencies. However, the efficacy of this technique diminishes at high frequencies toward 20 kHz as the loop gain rolls off and the effects of mismatch re-emerge.…”

Section: Introductionmentioning

confidence: 99%

A Chopper Class-D Amplifier for PSRR Improvement Over the Entire Audio Band

Zhang

Rozsa

Berkhout³

et al. 2022

IEEE J. Solid-State Circuits

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“…The PSRR can also be improved by filtering the supply off-chip at the expense of increased system size. In [1,2], an output common-mode regulation loop is employed to improve PSRR, but the PSRR drops significantly towards the edge of the audio band (20 kHz).…”

Section: Introductionmentioning

confidence: 99%

A -109.1 dB/-98 dB THD/THD+N Chopper Class-D Amplifier with >83.7 dB PSRR Over the Entire Audio Band

Zhang

Rozsa

Berkhout³

et al. 2021

ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)

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This paper reports a chopper Class-D audio amplifier that obtains high PSRR over the entire audio band. A chopping scheme is proposed to minimize intermodulation distortion between pulse-width modulation (PWM) and chopping in the audio band. A high-voltage chopper is developed to handle a 14.4 V PWM signal. Timing matching techniques are proposed to minimize chopping nonidealities which ensure good PSRR and THD. Fabricated in a 180nm BCD process, the prototype obtains a PSRR >109 dB at 217 Hz and >83.7 dB over the entire audio band. It also achieves −109.1 dB/−98 dB THD/THD+N and can deliver a maximum of 13 W to an 8-Ω load.

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“…To achieve higher efficiency and improve the quality of amplifiers, the class-D configuration can be utilized [4]. The class-D configuration contains three main stages: (1) modulation stage, (2) power stage, and (3) filtering stage [4].…”

Section: Introductionmentioning

confidence: 99%

“…The utilized method in the modulation stage can be divided into two categories: (1) Pulse Width Modulation (PWM) [3], and (2) Pulse Density Modulation (PDM) such as delta sigma modulator [4]. In the PWM modulation, the comparator generates a pulse signal based on the input signal and a carrier signal, but this method leads to unwanted signals and harmonics due to carrier signal's low frequency [5].…”

Section: Introductionmentioning

confidence: 99%