A 10-bit, 290 fJ/conv. Steps, 0.13mm², Zero-Static Power, Self-Timed Capacitance to Digital Converter

Abstract

This paper presents an ultra-low power 10-bit capacitance to digital converter. Full dynamic circuits realize zero-static power and ultra-low FoM of 290 fJ/conv. steps. It, for example, consumes only 3 nA at sampling frequency of 30 Hz. A differential architecture keeps the linearity error small up to the Nyquist frequency of sensor capacitance variation. Furthermore, internal clock signals are generated in self timed manner suitable for micro controller systems. The prototype was fabricated in 0.18 µm CMOS process and measured data fit with the real sensor characteristic precisely. These features are suitable for in-vivo medical systems or sensor-telemetry micro systems because of the ultra-low power and zero-static current operation with the high precision measure of pressure in asynchronous micro controller systems.

Power-Efficiency Evolution of Capacitive Sensor Interfaces

“…Furthermore, since the entire sensor interface consumes only dynamic power (except for leakage) when a dynamic comparator is used, ultra-low absolute power consumption can be achieved inherently at a low sampling rate. Power consumption as low as 4.2 nW has been reported [36].…”

Advantage and Possibility of Application-domain Specific Instruction-set Processor (ASIP)

“…Proposed solution to these requirements is the medical domain specific SoC device that integrates interfaces to various sensors, analog to digital convertors (ADC) 43) , micro processor unit (MPU), memory (RAM and ROM), RF (radio frequency) communication circuit, as well as clock generator and power management unit. The SoC device is named MeSOC-I (Medical domain specific System On Chip, type I).…”