A 10-b 600-MS/s 2-Way Time-Interleaved SAR ADC With Mean Absolute Deviation-Based Background Timing-Skew Calibration

Song, Jian; Ragab, Kareem; Tang, Xiyuan; Sun, Nan

doi:10.1109/tcsi.2019.2907581

Cited by 16 publications

(13 citation statements)

References 15 publications

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“…This paper presents a new window detection scheme and the timing-skew calibration algorithm for the high-speed time-interleaved SAR ADCs. The proposed window detector is more resistant to PVT variations, and it has lower digital complexity than previous works [20,23]. In addition, it has a higher area efficiency than [22].…”

Section: Timing-skew Calibration Techniques: a Reviewmentioning

confidence: 93%

“…Meanwhile, the derivative-based timing-skew calibration scheme was proposed in [21,26]. This scheme exploits an auxiliary ADC to get the input derivative and then calibrates for it by extracting There have been extensive studies to overcome the timing-skew error problem of the time-interleaved ADCs, and the various timing-skew calibration techniques have been proposed [14][15][16][18][19][20][21][22][23][25][26][27][28][29][30]. In Section 2, the previous timing-skew calibration techniques will be reviewed in detail.…”

Section: Timing-skew Calibration Techniques: a Reviewmentioning

confidence: 99%

“…More recently, a timing-skew calibration scheme using a window detector was proposed [20,22,23]. The basic motivation for this scheme is that the timing-skew information can be obtained by detecting whether ∆V is within a specified window region or not.…”

Section: Timing-skew Calibration Techniques: a Reviewmentioning

confidence: 99%

“…Then, detecting whether the input is in the specific window region or not is critical in this scheme. To this end, a detection technique using a comparator and its comparison time was presented in [20,23]. As shown in Figure 4, if the input voltage falls into the window region, the comparison time becomes longer than a certain time.…”

Section: Timing-skew Calibration Techniques: a Reviewmentioning

confidence: 99%

“…To enable high-speed ADC designs while maintaining the power-efficient advantage, researches to apply the time-interleaved architecture to the SAR ADC have been intensively studied [5,[15][16][17][18][19][20][21][22][23]. Parallel operations of several slow-running sub-ADCs provide the same parallelization effect as a single fast ADC, enabling the low-power and high-speed ADCs.…”

Section: Introductionmentioning

confidence: 99%

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Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems

Seong

Jung

Yoon

et al. 2020

Sensors

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Ultra-wideband (UWB) wireless communication is prospering as a powerful partner of the Internet-of-things (IoT). Due to the ongoing development of UWB wireless communications, the demand for high-speed and medium resolution analog-to-digital converters (ADCs) continues to grow. The successive approximation register (SAR) ADCs are the most powerful candidate to meet these demands, attracting both industries and academia. In particular, recent time-interleaved SAR ADCs show that multi-giga sample per second (GS/s) can be achieved by overcoming the challenges of high-speed implementation of existing SAR ADCs. However, there are still critical issues that need to be addressed before the time-interleaved SAR ADCs can be applied in real commercial applications. The most well-known problem is that the time-interleaved SAR ADC architecture requires multiple sub-ADCs, and the mismatches between these sub-ADCs can significantly degrade overall ADC performance. And one of the most difficult mismatches to solve is the sampling timing skew. Recently, research to solve this timing-skew problem has been intensively studied. In this paper, we focus on the cutting-edge timing-skew calibration technique using a window detector. Based on the pros and cons analysis of the existing techniques, we come up with an idea that increases the benefits of the window detector-based timing-skew calibration techniques and minimizes the power and area overheads. Finally, through the continuous development of this idea, we propose a timing-skew calibration technique using a comparator offset-based window detector. To demonstrate the effectiveness of the proposed technique, intensive works were performed, including the design of a 7-bit, 2.5 GS/s 5-channel time-interleaved SAR ADC and various simulations, and the results prove excellent efficacy of signal-to-noise and distortion ratio (SNDR) and spurious-free dynamic range (SFDR) of 40.79 dB and 48.97 dB at Nyquist frequency, respectively, while the proposed window detector occupies only 6.5% of the total active area, and consumes 11% of the total power.

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Section: Timing-skew Calibration Techniques: a Reviewmentioning

confidence: 93%

Section: Timing-skew Calibration Techniques: a Reviewmentioning

confidence: 99%

Section: Timing-skew Calibration Techniques: a Reviewmentioning

confidence: 99%

Section: Timing-skew Calibration Techniques: a Reviewmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems

Seong

Jung

Yoon

et al. 2020

Sensors

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An 18‐bit 1‐GS/s time interleaved analog‐to‐digital converter with timing skew calibration based on an adaptive genetic algorithm

Zhao

Zhang

et al. 2023

Circuit Theory & Apps

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SummaryA foreground calibration method for timing skews of the time interleaved analog‐to‐digital converter (TIADC) system is proposed in this paper. In this method, the adaptive genetic algorithm (AGA) is used to replace the traditional least mean square (LMS) method to detect the timing skews, and the variable delay lines are used to calibrate the timing skews. This method can accomplish the detection and calibration of positive and negative timing skews, and the reference channels are not required. In addition, compared with other methods, this method has higher detection speed and detection accuracy. In this paper, a four‐channel 18‐bit 1‐GS/s TIADC system is modeled, and the performance of the proposed method is further verified. The results show that the convergence speed and the calibration accuracy of this method are higher, the signal‐to‐noise ratio (SNR) of the TIADC system is improved by 65.9 dB after calibration, and this method is also effective when the frequency of the input signal is close to the Nyquist frequency.

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A comprehensive review of time skew background calibration and mitigation techniques in high‐speed time‐interleaved analog‐to‐digital converters

Navidi,

Navidi

2024

Circuit Theory & Apps

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A significant challenge in designing high‐speed time‐interleaved ADCs (TI‐ADCs) is the presence of time skew mismatch, resulting from uneven sampling across different channels and constituting a significant source of error. This error can be mitigated either by employing samplers unaffected by time skew or by employing foreground/background time skew calibration methods. Considering that the complexity of time skew calibration can complicate analog‐to‐digital converter (ADC) design, simpler techniques are essential, particularly with the development of higher‐speed ADCs using smaller technology nodes. This paper offers a comprehensive examination of various techniques applied in TI‐ADCs to address time skew‐related issues. We will explore skew‐tolerant sampling techniques to alleviate time skew errors, followed by an exploration of background time skew calibration methods. The primary focus of this paper centers on background time skew calibration techniques, which have become integral to improving the dynamic performance of high‐speed TI‐ADCs. The main background time skew calibration techniques to be reviewed include error injection techniques, reference ADC‐based techniques, input slope estimation, autocorrelation‐based techniques, and variance‐based techniques.

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A 10-b 600-MS/s 2-Way Time-Interleaved SAR ADC With Mean Absolute Deviation-Based Background Timing-Skew Calibration

Cited by 16 publications

References 15 publications

Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems

Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems

An 18‐bit 1‐GS/s time interleaved analog‐to‐digital converter with timing skew calibration based on an adaptive genetic algorithm

A comprehensive review of time skew background calibration and mitigation techniques in high‐speed time‐interleaved analog‐to‐digital converters

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