A 10-b 20-MS/s SAR ADC With DAC-Compensated Discrete-Time Reference Driver

Abstract

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Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology

“…Therefore, the input range of the proposed time-mode ADC is not limited by the non-linearity of its VTC, unlike the other non-hybrid time-mode ADCs. [89] 16 [8] 16 [13] 18 [17] 16 [9] 16 [10] As compared to the other hybrid time-mode ADCs and the conventional SAR ADC, the proposed time-mode ADC does not outperform them. These other ADCs are able to achieve either higher ENOBs at similar sampling rates [8,13,89], or 60 times higher sampling rate with similar ENOB [17].…”

“…[89] 16 [8] 16 [13] 18 [17] 16 [9] 16 [10] As compared to the other hybrid time-mode ADCs and the conventional SAR ADC, the proposed time-mode ADC does not outperform them. These other ADCs are able to achieve either higher ENOBs at similar sampling rates [8,13,89], or 60 times higher sampling rate with similar ENOB [17]. At the same time, except [8], their figure of merits are much lower than the proposed time-mode ADC.…”

“…For instance, the improvements in oscillation frequency for an N = 11, S = 9 NSRO and an N = 11, S = 7 NSRO are estimated to be 1. 89…”

“…SAR ADC is able to achieve very low power consumption, and hence, can achieve excellent figure of merits in tens of fJ/conv.-step. This characteristic of SAR ADC is demonstrated by the conventional SAR ADC [89] and the hybrid time-mode ADC that uses a SAR ADC as its coarse ADC [13]. Their figure of merits are by far the best among all of the ADCs that are summarized in Table 5.4.…”

Projeto de um conversor analógico-digital para um receptor UWB aplicado na detecção de câncer de mama em tecnologia CMOS.

“…Com uma F oM S de 162 (dB), este trabalho é melhor aos demais implementados em tecnologia CM OS de 180 nm. Por um pouco só,[62] atinge uma F oM S melhor.Porém, considerando que o nó tecnológico deste outro trabalho é de 65 nm, a tensão de alimentação é 1 V e a resolução é de 10 bits, não é possível fazer uma comparação justa com este trabalho. Com base nisto, o ADC projetado consegue desempenho do estado da arte ao nível de simulação layout.…”