A 1 Gb/s Mixed-Signal Baseband Analog Front-End for a 60 GHz Wireless Receiver

Sobel, D.A.; Brodersen, R.W.

doi:10.1109/jssc.2009.2014731

Cited by 42 publications

(24 citation statements)

References 12 publications

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“…The coefficients of the feedforward linear equalizer can be calculated on the precursor parts of the impulse response using a minimum mean square error (MMSE) criterion, which can be expressed in the frequency domain [18]: (8) where and are discrete Fourier transform of and , respectively . The complexity of this operation is low because the number of taps in the linear equalizer is minimized to be six and can be reduced further depending on the channel profile.…”

Section: Hardware Implementationmentioning

confidence: 99%

“…Although they reduce the length of the effective channel response, they cannot eliminate the need for the receive equalizer. In order to achieve a low power consumption of the receiver, an analog equalizer has been considered [8]. The analog equalizer is a popular solution in the high-speed wired link for back-plane communication [9]- [12].…”

Section: Introductionmentioning

confidence: 99%

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A 2 Gb/s 5.6 mW Digital LOS/NLOS Equalizer for the 60 GHz Band

Park

Richards

Nikolić

2011

IEEE J. Solid-State Circuits

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Abstract-The wide unlicensed bandwidth of a 60 GHz channel presents an attractive opportunity for high data rate and low power personal area networks (PANs). The use of single-carrier modulation can yield energy-efficient transmitter and receiver implementation, but equalization of the long channel response in non-line-of-sight (NLOS) conditions presents a significant challenge. A digital equalizer for 60 GHz channels has been designed for both line of sight (LOS) and NLOS channel conditions to meet the IEEE WPAN standard. Power consumption is minimized by using a parallelized distributed arithmetic (DA) architecture. A 2 mm 2 mm test chip in 65nm CMOS implements a 6 tap feedforward and 32 tap feedback equalizer that can be configured to cancel the response of up to 72 symbols, and consumes 5.6 mW at 2 Gb/s throughput. The chip also includes a channel estimator based on a Golay correlator for setting the equalizer coefficients and estimating frequency and timing error.

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Section: Hardware Implementationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A 2 Gb/s 5.6 mW Digital LOS/NLOS Equalizer for the 60 GHz Band

Park

Richards

Nikolić

2011

IEEE J. Solid-State Circuits

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“…The equalization of a linear wireless communication channel with analog or mixed-signal solutions has been studied in [10] [11]. But, to the best of our knowledge, the compensation of a realistic non-linear communication channel with an analog equalizer has never been investigated.…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, it is well known that the analog-to-digital converter (ADC) is a bottleneck for high bandwidth communications [10] [11] [17] because it is difficult to combine high sampling frequency with the important resolution required by digital equalizers. With our solution, the ADCs are situated at the output of the equalizer.…”

Section: Introductionmentioning

confidence: 99%

High performance bio-inspired analog equalizer for DVB-S2 non-linear communication channel

Bauduin

Vinckier

Massar

et al. 2016

2016 IEEE 17th International Workshop on Signal Processing Advances in Wireless Communications (SPAWC)

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Abstract-To ensure a high signal-to-noise power ratio at the terrestrial receiver, the power amplifier aboard the satellite often works close to its saturation point. Unfortunately, this operating point also adds non-linear distortions in the communication channel. The literature proposes several digital equalizers to compensate for this channel. But their complexity makes their digital implementation difficult in particular for high bandwidth communications. Analog equalizers are an interesting solution to reduce the equalizer complexity. Here we numerically demonstrate that a dedicated analog optoelectronic implementation based on the Echo State Network paradigm can reach state-of-the-art performance of digital equalizers, while reducing the required resolution of the analog-to-digital converters.

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“…Hence the estimation of the various unknown transmission parameters needs to be considered jointly and in the context of a complete system. This is especially critical for time-domain receivers based on symbol-spaced sampling, which have been often been proposed [3], [4], [5] as the most energy-efficient architecture choice for mmWave systems.…”

Section: Introductionmentioning

confidence: 99%

Digital synchronization for symbol-spaced IEEE802.11ad Gigabit mmWave systems

Preyss¹,

Burg²

2015

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)

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Abstract-A complete digital synchronization architecture for an IEEE 802.11ad compliant 60 GHz receiver is presented. The characteristics of mmWave systems require a holistic view on the problem of parameter estimation, such that not each parameter is dealt with on its own, but in the context of the complete receiver architecture. To this end the proposed synchronization unit covers packet detection, frequency offset compensation, signal-to-interference-plus-noise (SINR) maximization, frame synchronization, and channel estimation. The presented architecture is especially suitable for low-complexity time domain receivers, which are the most power efficient systems for mmWave, but have high demands in terms of synchronization. A novel two step synchronization procedure takes the specific requirements of the employed equalization and detection stages into account, to maximize the overall system performance. Performance is further improved by a heuristic sampling phase alignment mechanism which search the best sampling phase in order to increase the effective SINR in finite length receivers.

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A 1 Gb/s Mixed-Signal Baseband Analog Front-End for a 60 GHz Wireless Receiver

Cited by 42 publications

References 12 publications

A 2 Gb/s 5.6 mW Digital LOS/NLOS Equalizer for the 60 GHz Band

A 2 Gb/s 5.6 mW Digital LOS/NLOS Equalizer for the 60 GHz Band

High performance bio-inspired analog equalizer for DVB-S2 non-linear communication channel

Digital synchronization for symbol-spaced IEEE802.11ad Gigabit mmWave systems

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