A 1.9nJ/bit, 5Mbps multi-standard ISM band wireless transmitter using fully digital PLL

Abstract

This paper presents an energy efficient transmitter for multi-standard applications (IEEE802.15.4, BLE, 5Mbps) in ISM2.4GHz band. It incorporates a fully digital PLL with two point modulation to achieve upto 5Mbps data rate at 9.5mW power consumption (including all power management blocks) at 0dBm output power, leading to 1.9nJ/b efficiency. The proposed digital PLL uses a counter based area and power efficient re-circulating TDC, current reuse low area DCO using resistive tail, process compensated high speed divider, class-AB PA stages, and fully integrated on-chip LDOs. The entire transmitter occupies 0.35mm 2 Silicon area in a 65nm digital CMOS process.Index Terms -multi-standard transmitter, high data rate loop modulator, ultra low energy, digital PLL, low area.

A digital to time converter with fully digital calibration scheme for ultra-low power ADPLL in 40 nm CMOS

“…The RF PLL is an essential block of an IoT node, but it consumes a large portion of the overall power (20-35%) [1]. With technology scaling, intensive digital approaches such as the use of an all-digital PLL (ADPLL) are now becoming a reality [2].…”