2009
DOI: 10.1088/1674-4926/30/12/125004
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A 1.5 Gb/s monolithically integrated optical receiver in the standard CMOS process

Abstract: A monolithically integrated optical receiver, including the photodetector, has been realized in Chartered 0.35 μm EEPROM CMOS technology for 850 nm optical communication. The optical receiver consists of a differential photodetector, a differential transimpedance amplifier, three limiting amplifiers and an output circuit. The experiment results show that the receiver achieves an 875 MHz 3 dB bandwidth, and a data rate of 1.5 Gb/s is achieved at a bit-error-rate of 10−9. The chip dissipates 60 mW under a single… Show more

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Cited by 2 publications
(2 citation statements)
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“…Among the references mentioned in Table 1, using the same 0.35 m CMOS technology, the speed rate of the proposed TIA is higher than that of Refs. [9][10][11]. As the inductorless design, the chip area is less than in Refs.…”
Section: Discussionmentioning
confidence: 98%
See 1 more Smart Citation
“…Among the references mentioned in Table 1, using the same 0.35 m CMOS technology, the speed rate of the proposed TIA is higher than that of Refs. [9][10][11]. As the inductorless design, the chip area is less than in Refs.…”
Section: Discussionmentioning
confidence: 98%
“…As the inductorless design, the chip area is less than in Refs. [9][10][11][12]. In Table 1, the figure of merit (FOM) is calculated for the state of the optical receiver TIA in CMOS.…”
Section: Discussionmentioning
confidence: 99%