A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)

Mizoguchi, D.; Yusof, Yusmeeraz; Miura, Noriyuki; Sakura, T.; Kuroda, Tadahiro

doi:10.1109/isscc.2004.1332634

Cited by 85 publications

(43 citation statements)

References 2 publications

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“…However, there is a high risk of false data detection when the noise level exceeds the sensitivity of the receiver. Consequently, the NRZ system has a larger bit error rate (BER) in noisy environments [3,4]. BPM signaling can be used to overcome some of the problems related to inductive links with NRZ signaling.…”

Section: Inductive-coupling System With Bpm Signaling 1 Conventimentioning

confidence: 99%

An Inductive-coupling Link with a Complementary Switching Transmitter and an Integrating Receiver

Jeong¹,

Kim²,

Kim³

et al. 2014

JSTS:Journal of Semiconductor Technology and Science

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Abstract-A transceiver for a high-speed inductivecoupling link is proposed. The bi-phase modulation (BPM) signaling scheme is used due to its good noise immunity. The transmitter utilizes a complementary switching method to remove glitches in transmitted data. To increase the timing margin on the receiver side, an integrating receiver with a pre-charging equalizer is employed. The proposed transceiver was implemented via a 130-nm CMOS process. The measured timing window for a 10 -12 bit error rate (BER) at 1.8 Gb/s was 0.33 UI.

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Section: Inductive-coupling System With Bpm Signaling 1 Conventimentioning

confidence: 99%

An Inductive-coupling Link with a Complementary Switching Transmitter and an Integrating Receiver

Jeong¹,

Kim²,

Kim³

et al. 2014

JSTS:Journal of Semiconductor Technology and Science

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“…But they need a series of additional mechanical processes, which may lead to high costs and low yields. Wireless inter-chip connection technologies have been proposed in recent years, including capacitive-coupling connection [3,4] and inductive-coupling connection [5,6,7]. These two kinds of technology are compatible with standard CMOS process and do not require additional mechanical processes.…”

Section: Introductionmentioning

confidence: 99%

Analysis and measurement of misalignment effect in inductive-coupling wireless inter-chip connection

Zhang

et al. 2017

IEICE Electron. Express

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Inductive-coupling wireless connection is a promising interconnect technology for 3D stacked chips packaging. Misalignment between inductors of transmitter chip and receiver chip reduces the mutual inductance, leading to a signal transmit failure. A method to evaluate the signal attenuation caused by inductors misalignment is proposed based on the mutual inductance calculation. Misalignment tolerance under constant circuit parameters is given. Test chips are designed and fabricated in 180 nm CMOS process to verify the method. Measurements of the test chip show that the proposed method match well with testing results.

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“…Here, the chip was tested with ferrite yokes and the size of inductor was relatively large, and no tests were carried out between the PCB and chip. After that, inductive coupling techniques have been applied to inter-chip interconnection for SiP systems to fill the increasing gap between the system bandwidth and the I/O throughput [8]. Although successful experiments have been reported on wireless power transfer within SiP systems [3], results on power transfer between the PCB and chip showed limited power efficiency due to the mismatch between the PCB and CMOS processes [6].…”

Section: Introductionmentioning

confidence: 99%

Towards an inductively coupled power/data link for bondpad-less silicon chips

Luan

Eftekhar

Murphy

et al. 2011

2011 IEEE International Symposium of Circuits and Systems (ISCAS)

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Abstract-This paper explores the concept of developing a bondpad-less fully-integrated inductive link for power/data transfer between a CMOS Integrated Circuit (IC) and a PCB. A key feature of the implemented system is that it requires no offchip components. The proposed chip uses a standard 0.35 µm process and occupies an area of 2.5 mm×2.5 mm and an on-chip inductor occupies an area of 1.5 mm×1.5 mm. At 900 MHz, 9 mW was designed to be provided to the chip (up to 22.5 mW with a total efficiency of 5 %). Binary Phase Shift Keying (BPSK) and Load shift keying (LSK) are used for the the PCB-to-chip and chip-to-PCB link respectively for half-duplex communication. An Injection-Locked-Oscillator-based BPSK demodulator is implemented on-chip to save power. The maximum data rate for the PCB-to-chip link is 10 Mb/s. The estimated area of the circuitry is only 2 mm 2 which is 32 % of the total chip area.

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A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)

Cited by 85 publications

References 2 publications

An Inductive-coupling Link with a Complementary Switching Transmitter and an Integrating Receiver

An Inductive-coupling Link with a Complementary Switching Transmitter and an Integrating Receiver

Analysis and measurement of misalignment effect in inductive-coupling wireless inter-chip connection

Towards an inductively coupled power/data link for bondpad-less silicon chips

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