A 0.7V single-supply SRAM with 0.495um&lt;sup&gt;2&lt;/sup&gt; cell in 65nm technology utilizing self-write-back sense amplifier and cascaded bit line scheme

Kushida, K.; Suzuki, Ai; Gou, Fujun; Kawasumi, A.; Hirabayashi, O.; Takeyama, Y.; Sasaki, Tadahiro; Katayama, A.; Fujimura, Y.; Yabe, T.

doi:10.1109/vlsic.2008.4585946

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A 0.7V single-supply SRAM with 0.495um<sup>2</sup> cell in 65nm technology utilizing self-write-back sense amplifier and cascaded bit line scheme

Cited by 7 publications

References 9 publications

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