A 0.7 V, Ultra-Wideband Common Gate LNA with Feedback Body Bias Topology for Wireless Applications

Abstract

An ultra-wideband (UWB) low noise amplifier (LNA) for 3.3–13.0 GHz wireless applications using 90 nm CMOS is proposed in this paper. The proposed LNA uses an improved common-gate (CG) topology utilizing feedback body biasing (FBB), which improves noise figure (NF) by a considerable amount. Parallel-series tuned LC network was used between the common-gate first stage and the cascoded common-source (CS) stage to achieve the maximum signal flow from CG to CS stage. Improved CS topology with a series inductor at the drain terminal in the second stage connected and cascoded CS third stage provides high power gain (S21) and bandwidth enhancement throughout the complete UWB. A common-drain buffer stage at the output provides high output reflection coefficient (S22). It achieves an average power gain (S21) of 14.7 ± 0.5 dB with a noise figure (NF) of 3.0–3.7 dB. It has an input reflection coefficient (S11) less than −11.7 dB for 3.3–13.0 GHz frequency and output reflection coefficient (S22) of less than −10.6 dB with a very high reversion isolation (S12) of less than −72.4 dB. It consumes only 5.2 mW from a 0.7 V power supply.

The Development of Cascode Low Noise Amplifier with Double Feedback Technique Architecture for Wireless Communication

“…The inductive source degeneration used to achieve simultaneous noise contribution and input matching such that the antenna has optimal power transfer which commonly matched with off-chip components [10]. Meanwhile, utilizing the CG feedback body biasing (FBB) technique at the input transistor leads to a further decrease in the supply of power (Vdd) due to a decrease in the threshold voltage resulting from a decrease in the use of power consumption for 3.1 -10.6 GHz frequency wideband matching [11]. According to Wu & Yang [12], the feedback technique proposed utilized improvement in the bandwidth and employed compensation on gain and become a major factor to surpass the crucial problem of stability and gain flatness besides capable of solving problem low breakdown voltage and achieve high power performance.…”

Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm

“…However, it is important to note that the use of this technique leads to reduced linearity. Furthermore, the forward body biasing (FBB) technique, detailed in [19,20], merits consideration. While this technique does contribute to a lower threshold voltage without compromising the gain, noise figure, and supply voltage, it is worth acknowledging that maintaining linearity remains a challenging task for researchers and LNA designers.…”