Abstract:This paper proposed a new high-order curvature compensation technique for a new bandgap voltage reference structure using the temperature characteristics of current gain b and emitter bandgap narrowing factor DE G of a lateral NPN bipolar transistor. The new structure can produce two voltage references, which are 1.209 and 2.418 V, respectively. The simulation results show that the temperature coefficients of the two output voltage are 0.52 ppm/°C, the PSRR is more than 60 dB for frequencies at 10 kHz, and the… Show more
“…For example, a voltage reference [155] or IR drop sensor [156] may be made temperature insensitive to improve the accuracy of a sensor reading. temperature variations on the ring oscillator, allowing for improved accuracy in voltage measurements.…”
Section: Temperature Sensitivity Adjustment For Improved Sensor Accuracymentioning
“…For example, a voltage reference [155] or IR drop sensor [156] may be made temperature insensitive to improve the accuracy of a sensor reading. temperature variations on the ring oscillator, allowing for improved accuracy in voltage measurements.…”
Section: Temperature Sensitivity Adjustment For Improved Sensor Accuracymentioning
“…For example, a voltage [25] or IR drop sensor [26] may be made temperature insensitive to improve the accuracy of a sensor reading. Reducing the impact of temperature variations on ring oscillator frequency can enable dramatic improvements in voltage variation readings.…”
Section: B Temperature Sensitivity Adjustment For Sensor Accuracymentioning
This paper presents a new circuit technique to reduce temperature-induced delay uncertainty. Programmable temperature compensation devices (PTCDs) are used to tune logic gate pull-up and pull-down networks to their respective temperature-insensitive operating points, dramatically improving thermal resilience. Over a to 125 temperature range, the proposed technique is shown to decrease temperature-induced delay uncertainty by up to 91% compared to other temperature resilient methods. We explore the limitations of using multiand adaptive body biasing approaches to achieve temperature insensitivity; the proposed method achieves insensitive operation at larger supply voltages than prior methods, providing temperature insensitivity at nominal voltage for the first time. We explain how to integrate PTCDs into a variety of logic gates as well as larger structures such as a 1-bit mirror adder. Applying the proposed method to a clock tree is shown to reduce temperature-induced clock skew by up to 98%. Process variations degrade the temperature resilience; however, the proposed approach still improves temperature resilience by 50% over prior methods when these variations are considered. Furthermore, we propose a process variation-compensation system to maintain our PTCD method's temperature resilience.Index Terms-Adaptive threshold voltage, delay uncertainty, temperature insensitivity, temperature variation.
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