A 0.18-&amp;lt;tex&amp;gt;$muhboxm$&amp;lt;/tex&amp;gt;CMOS 3.5-Gb/s Continuous-Time Adaptive Cable Equalizer Using Enhanced Low-Frequency Gain Control Method

Choi, J. J.; Hwang, Moon-Sang; Jeong, Deog‐Kyoon

doi:10.1109/jssc.2003.822774

Cited by 116 publications

(83 citation statements)

References 11 publications

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“…In order to overcome this, various types of high-speed equalizers have been reported [1][2][3], [7][8][9][10]. In particular, equalizers having passive filters based on RLC components are attractive as their power consumption is much less than those with active filters [1][2][3].…”

Section: Introductionmentioning

confidence: 99%

An 8-Gb/s Inductorless Adaptive Passive Equalizer in 0.18-㎛ CMOS Technology

Moon

Choi²

2012

JSTS:Journal of Semiconductor Technology and Science

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Abstract-This paper presents an inductorless 8-Gb/s adaptive passive equalizer with low-power consumption and small chip area. The equalizer has a tunable RC filter which provides high-frequency gain boosting and a limiting amplifier that restores the signal level from the filter output. It also includes a feedback loop which automatically adjusts the filter gain for the optimal frequency response. The equalizer fabricated in 0.18-µm CMOS technology can successfully equalize 8-Gb/s data transmitted through up to 50-cm FR4 PCB channels. It consumes 6.75 mW from 1.8-V supply voltage and occupies 0.021 mm 2 of chip area.

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Section: Introductionmentioning

confidence: 99%

An 8-Gb/s Inductorless Adaptive Passive Equalizer in 0.18-㎛ CMOS Technology

Moon

Choi²

2012

JSTS:Journal of Semiconductor Technology and Science

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“…To overcome this ISI problem, receiver equalizer techniques have been developed [2,3,4]. These are two kinds: discrete-time equalizers [2] and continuous-time equalizers [3,4].…”

Section: Introductionmentioning

confidence: 99%

“…To overcome this ISI problem, receiver equalizer techniques have been developed [2,3,4]. These are two kinds: discrete-time equalizers [2] and continuous-time equalizers [3,4]. Between these two kinds, continuous-time equalizers are more proper than discrete-time equalizers to implement DDI because continuous-time equalizers require less complexity and smaller area for system design which affect the cost of product.…”

Section: Introductionmentioning

confidence: 99%

A continuous-time equalizer adopting a clock attenuation tracking technique for digital display interface (DDI)

Kim

Yoo

Kim

2007

IEICE Electron. Express

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This paper presents a continuous-time equalizer adopting a clock attenuation tracking technique for digital display interface. This technique uses bottom hold circuit to detect the incoming clock attenuation. The generated loss signal is directly fed to equalizer filters, building adaptive feed-forward loops which contribute the stability of the system. The design was done in 0.18-µm CMOS technology. Simulation results summarize that eye-width of minimum 0.75UI is achieved until −33 dB channel loss at 1.65 Gbps. The average power consumption of the equalizer is 3.42 mW per channel, a very low value in comparison to those of previous researches, and the effective area is 0.127 mm 2 . Keywords: continuous-time equalizer, channel loss tracking Classification: Integrated circuits

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“…The first flavor is continuous-time equalization, with (HF) boosting circuits that compensate for the attenuation of the channel, also called 'linear equalization' [117,123,[125][126][127][128][129][130][131][132][133]. This flavor has the longest history and is still being used in many contemporary transceivers, but its popularity seems to diminish because of another equalization form, the so called 'Decision-feedback equalization' (DFE) [98, 111-116, 119, 134-138].…”

Section: Receiver-side Equalizationmentioning

confidence: 99%

“…For continuous-time receiver equalizers, other adaptation algorithms have been used, for example methods that compare the energy in different frequency bands before and after the detector [125,128,129,131,133]. A similar method is to compare the slope before and after the detector [130].…”

Section: Adaptive Equalizationmentioning

confidence: 99%

On-chip data communication : analysis, optimization and circuit design

Schinkel¹

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A 0.18-<tex>$muhboxm$</tex>CMOS 3.5-Gb/s Continuous-Time Adaptive Cable Equalizer Using Enhanced Low-Frequency Gain Control Method

Cited by 116 publications

References 11 publications

An 8-Gb/s Inductorless Adaptive Passive Equalizer in 0.18-㎛ CMOS Technology

An 8-Gb/s Inductorless Adaptive Passive Equalizer in 0.18-㎛ CMOS Technology

A continuous-time equalizer adopting a clock attenuation tracking technique for digital display interface (DDI)

On-chip data communication : analysis, optimization and circuit design

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