A 0.15-to-0.5 V Body-Driven Dynamic Comparator with Rail-to-Rail ICMR

Sala, R.; Spinogatti, Valerio; Bocciarelli, Cristian; Centurelli, Francesco; Trifiletti, Alessandro

doi:10.3390/jlpea13020035

Cited by 7 publications

(1 citation statement)

References 66 publications

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“…The proposed comparator exhibits the best EDP among the standard-cellbased comparators in the literature (referring to both the 180nm and 130 nm implementations). The 130nm implementation of the proposed topology results in the best EDP also with respect to ULV full custom comparators, reaching a EDP of only 0.188[aJ /kHz] which is about 10 times lower than [46] which resulted in the lowest EDP in the recent literature. The area footprint of the proposed topology results much lower than the area of all other ULV comparators and it results about 5 times more compact than previously presented rail-torail ICMR standard-cell-based comparators considering the same technology node.…”

Section: Comparisonmentioning

confidence: 93%

Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications

Sala,

Centurelli,

Scotti

et al. 2024

IEEE Access

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In this paper a novel ultra-low voltage (ULV) standard-cell-based comparator which provides rail-to-rail input common-mode range (ICMR) is presented. The topology, unlike the others in the literature, uses only 2-inputs NAND gates and is able to operate with supply voltages as low as 0.15V. A detailed theoretical analysis based on transistor level modeling is provided to explain the operating principle and highlight the performance advantages of the proposed comparator. The circuit has been tested through several simulations, including corner analysis and Monte Carlo runs, by using three different technologies: 180 nm, 130 nm and 28 nm for both a supply voltage of 0.3 V and 0.15 V. The results found not only confirm the robustness of the proposed comparator, but also demonstrate very advantageous performances. Indeed, for the same technology node it exhibits the highest speed and the lowest EDP (about ten times lower than the one of the others standard-cell-based comparators in the literature). It exhibits also the lowest power consumption and silicon area.

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Section: Comparisonmentioning

confidence: 93%

Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications

Sala,

Centurelli,

Scotti

et al. 2024

IEEE Access

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An Ultra Low Voltage Physical Unclonable Function Exploiting Body-Driven

Della Sala,

Bellizia,

Centurelli

et al. 2023

Lecture Notes in Electrical Engineering

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On the Feasibility of Cascode and Regulated Cascode Amplifier Stages in ULV Circuits Exploiting MOS Transistors in Deep Subthreshold Operation

Della Sala,

Centurelli,

Monsurró

et al. 2024

IEEE Access

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In the last years several ultra-low voltage (ULV) operational transconductance amplifiers (OTAs) with supply voltages below 0.5V have been proposed in the literature. To achieve high gain, multistage amplifiers are frequently exploited, in spite of the complexity of design and compensation approaches, whereas cascode and regulated-cascode OTA topologies have rarely been exploited to implement ULV amplifiers. On the other hand, most ULV amplifiers are designed for IoT and biomedical applications in which reducing power consumption is the most important specification, and MOS devices are operated in the subthreshold region. This paper focuses on exploiting the subthreshold operating region to design ULV single-stage OTAs that utilize an output cascoded branch to increase the equivalent output resistance and, consequently, the overall voltage gain. A detailed analytical study of the conditions for triode and saturation regions for MOS devices operating in deep subthreshold region is presented to demonstrate that, for an appropriate choice of the inversion coefficient (IC), a cascode configuration exhibits higher gain than a single transistor, for the same voltage overhead, even in ULV conditions. More specifically, the results presented in this work demonstrate that 4 MOS devices (2 NMOS and 2 PMOS) can be reliably stacked to build a complementary cascode amplifier, even with a supply voltage as low as 0.4V. We also present a novel topology of regulated-cascode amplifier suitable to be operated with a supply voltage of 0.4V and a voltage gain approaching 100dB. Simulation results referring to a 180nm CMOS technology and including PVT and mismatch variations confirm state-of-the-art performances, as well as the good robustness of the proposed regulated-cascode ULV OTA.

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A 0.15-to-0.5 V Body-Driven Dynamic Comparator with Rail-to-Rail ICMR

Cited by 7 publications

References 66 publications

Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications

Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications

An Ultra Low Voltage Physical Unclonable Function Exploiting Body-Driven

On the Feasibility of Cascode and Regulated Cascode Amplifier Stages in ULV Circuits Exploiting MOS Transistors in Deep Subthreshold Operation

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