2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers 2015
DOI: 10.1109/isscc.2015.7062980
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9.6 A 5.3GHz 16b 1.75GS/S wideband RF Mixing-DAC achieving IMD<-82dBc up to 1.9GHz

Abstract: Cellular multicarrier transmitters for communication infrastructure require both high linearity and large bandwidth (BW) at GHz frequencies. The combination of multicarrier GSM, WCDMA and LTE typically requires IMD<-80dBc and SFDR>80dBc in a large transmit bandwidth of 300MHz and at an output frequency of up to 3.5GHz and beyond. Current-Steering (CS) Nyquist DACs have large BW, but their linearity drops for increasing output frequencies [1]. A separate mixer is therefore needed to generate an RF signal with h… Show more

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Cited by 10 publications
(18 citation statements)
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“…Since the proposed RF DAC is very compact in size, it can replace high-speed serial data link block in a digital ASIC meaning that basically the monolithic integration of the RF DAC comes with no die-area increase for the digital ASIC in fully digital beamforming 5G architectures. The proposed work is compared against some of the recent state-of-the-art RF DACs [1,4,11]. These RF DACs are implemented in current-steering architecture.…”
Section: Comparison and Conclusionmentioning
confidence: 99%
See 1 more Smart Citation
“…Since the proposed RF DAC is very compact in size, it can replace high-speed serial data link block in a digital ASIC meaning that basically the monolithic integration of the RF DAC comes with no die-area increase for the digital ASIC in fully digital beamforming 5G architectures. The proposed work is compared against some of the recent state-of-the-art RF DACs [1,4,11]. These RF DACs are implemented in current-steering architecture.…”
Section: Comparison and Conclusionmentioning
confidence: 99%
“…Finite output impedance of the unit element current sources causes harmonic distortion and mismatch between the unit element current sources causes timing and amplitude inaccuracy and hence harmonic distortion. To mitigate the finite output impedance of current-steering architecture, works in [1,4,11] utilize the bleeding current source technique proposed in [10], making the output impedance of the DAC independent of the input code. Moreover in a current-steering structure the mismatch can happen between unit current sources and also between the switches.…”
Section: Comparison and Conclusionmentioning
confidence: 99%
“…2.11 an active implementation of the mixer DAC is shown where the LO signal is applied to the gate of the current source transistor. Different variations on mixing DAC topology combining Gilbert mixer into DAC unit elements has been reported in [36,60,132,19,23,21,22,20,24]. A system-level method to implement a mixing DAC is proposed in Paper V in this thesis, where a discrete-time oscillatory tail current is used in current-steering DAC architecture [103].…”
Section: Mixing Dacmentioning
confidence: 99%
“…It has been shown that the bleeding current sources with 1 to 2% of the DAC unit cell current I u is sufficient to mitigate the input code dependency of the output impedance [67]. This technique has shown to be very effective and has been widely adopted in the state-of-the-art high-speed current-steering DACs [68,39,20,67].…”
Section: Finite Output Impedance Mitigationmentioning
confidence: 99%
“…Alternatively, mapping techniques have provided effective timing calibration without the need for additional analog circuitry [26,38,39]. Unfortunately, the effectiveness of such techniques depends on the use of many unary unit cells, increasing the area of the DAC and exacerbating clock distribution mismatches.…”
Section: Calibration Of Static Errorsmentioning
confidence: 99%