8 Gbits/s inductorless transimpedance amplifier in 90 nm CMOS technology

Atef, Mohamed; Aznar, Francisco; Schidl, Stefan; Polzer, A.; Gaberl, W.; Zimmermann, Horst

doi:10.1007/s10470-013-0242-4

Cited by 13 publications

(10 citation statements)

References 12 publications

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“…Front-end optical preamplifiers in the form of transimpedance amplifers (TIA) have become a viable optical receiver option as a first stage integrated within a comprehensive optical communication system. The search for low-power transimpedance amplifiers with wide bandwidth lead to the common form of regulated cascode (RGC) used in optical receiver topologies [1][2][3][4][5][6]. However, modification of the RGC structure in terms of input impedance has been the subject for research to achieve wider bandwidths.…”

Section: Introductionmentioning

confidence: 99%

A 65 nm CMOS Feedforward Transimpedance Amplifier for Optical Fibers Communications

Alsheikhjader

Aziz

Mustafa

et al. 2022

IJE

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A series of inductor loads may not be the best design criterion for improvement in circuit performance. In this work, the best compromise so far for the trade-off in power consumption, input referred noise current spectral density, with wide bandwidth, high transimpedance gain and low DC supply voltage is reported. A simulated 65 nm CMOS feedforward transimpedance amplifier is introduced with a series of single PMOS loads instead of a series of inductor loads. A bandwidth of 20.16 GHz with a transimpedance gain of 51.16 dBΩ, an input referred noise current spectral density of 34.3 p A⁄√Hz, a power consumption of 1.052 mW and with a 1V DC supply voltage are presented. In addition, an active inductor load (instead of inductor load) is introduced within the 65 nm CMOS feedforward transimpedance amplifier. A bandwidth of 3.75 GHz with a transimpedance gain of 42.7 dBΩ, an input referred noise current spectral density of 21.4 p A⁄√Hz, a power consumption of 0.66 mW and with a 1V DC supply voltage are reported. This 65 nm CMOS feedforward design process provides enough voltage headrom for gate-to-source terminals in amplifying transistors due to less DC voltage drop across PMOS loads. As a result, this design process consumes the lowest possible power consumption especially with the single PMOS loads as well as with the active inductor load.

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Section: Introductionmentioning

confidence: 99%

A 65 nm CMOS Feedforward Transimpedance Amplifier for Optical Fibers Communications

Alsheikhjader

Aziz

Mustafa

et al. 2022

IJE

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show abstract

“…To meet the requirements of low cost, high integration, and high manufacturability, TIAs based on CMOS technology have been actively investigated in the past decade. Due to the features of wide bandwidth and low power consumption, TIAs with regulated cascode (RGC) topology are widely explored in broadband optical receiver system [6,7,8,9,10,11]. Nevertheless, the input impedance of conventional RGC TIA needs to be further modified to provide enough bandwidth.…”

Section: Introductionmentioning

confidence: 99%

“…Yet, wide-band obtained by these techniques is at the expense of large chip area or/and gain reduction. Besides, along with the scaledown of CMOS technology, designers began to use advanced technology to improve the performance of TIA [10,11]. However, there still have many problems, such as high cost, large leakage current, and constrained circuit structure caused by low supply voltage.…”

Section: Introductionmentioning

confidence: 99%

A design methodology to extend bandwidth for regulated cascode transimpedance amplifier

Xie

Mao

et al. 2017

IEICE Electron. Express

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This brief analyzes the performance of regulated cascode (RGC) topology and develops a broadband transimpedance amplifier (TIA) incorporated with a novel dual shunt-feedback configuration. Compared to traditional RGC circuit, the proposed TIA improves the natural frequency and optimizes the damping factor. Furthermore, the common source auxiliary amplifier is replaced by an inverter amplifier to provide extra gain and reduce the equivalent input noise current. Based on 0.18-µm CMOS technology, a TIA with enhanced RGC structure was optimized and implemented, and the fabricated chip was mounted on a Rogers 4003C printed circuit board. The experimental results demonstrate a 5.2 GHz bandwidth and a 60.5 dBΩ transimpedance gain for 0.5 pF photodetector capacitance. The fluctuation of group delay is less than 50 ps, and the measured average equivalent input noise current density is about 14.99 pA/√Hz. The chip consumes 28.4 mW using 1.8 V supply.

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“…The dynamic range can be increased by increasing the sensitivity (TIA with lower noise) and/or increasing the maximum received input optical power where the TIA reaches saturation. The maximum limit can be increased by using a TIA with AGC or gain compression stage [2,3]. Fig.…”

Section: Introductionmentioning

confidence: 99%

8 Gbits/s inductorless transimpedance amplifier in 90 nm CMOS technology

Cited by 13 publications

References 12 publications

A 65 nm CMOS Feedforward Transimpedance Amplifier for Optical Fibers Communications

A 65 nm CMOS Feedforward Transimpedance Amplifier for Optical Fibers Communications

A design methodology to extend bandwidth for regulated cascode transimpedance amplifier

Transimpedance amplifier with a compression stage for wide dynamic range optical applications

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