7.72 ppm/&amp;#x00B0;C, ultralow power, high PSRR CMOS bandgap reference voltage

Hamouda, Abida; Arnold, R.G.; Manck, O.; Bouguechal, Nour-Eddine

doi:10.1109/vlsi-soc.2013.6673310

Cited by 7 publications

(6 citation statements)

References 4 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The most common SUPC implementations belong to three main categories. In the first category (type‐1 SUPC) a start‐up device, either an NMOS 22 or a PMOS transistor, 23 injects current in specific nodes of the bandgap core at the power‐on. This device is driven by an inverter gate having its input controlled either by the output reference voltage or by the CTAT voltage.…”

Section: Introductionmentioning

confidence: 99%

“…This device is driven by an inverter gate having its input controlled either by the output reference voltage or by the CTAT voltage. This inverter stops the current injection when the circuit is far from the wrong bias point, and it is usually implemented either with a PMOS load with the gate shorted to ground 22 or as a CMOS gate 23‐26 . In type‐2 SUPCs, a start‐up current is derived from the supply voltage and injected in the bandgap core.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A low‐power native NMOS‐based bandgap reference operating from −55°C to 125°C with Li‐Ion battery compatibility

Caselli

Liempd

Boni

et al. 2021

Circuit Theory & Apps

View full text Add to dashboard Cite

Summary The paper describes the implementation of a bandgap reference based on native‐MOSFET transistors for low‐power sensor node applications. The circuit can operate from −55°C to 125°C and with a supply voltage ranging from 1.5 to 4.2 V. Therefore, it is compatible with the temperature range of automotive and military‐aerospace applications, and for direct Li‐Ion battery attach. Moreover, the circuit can operate without any dedicated start‐up circuit, thanks to its inherent single operating point. A mathematical model of the reference circuit is presented, allowing simple portability across technology nodes, with current consumption and silicon area as design parameters. Implemented in a 55‐nm CMOS technology, the voltage reference achieves a measured average (maximum) temperature coefficient of 28 ppm/°C (43 ppm/°C) and a measured sample‐to‐sample variation within 57 mV, with a current consumption of 420 nA at 27°C.

show abstract

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A low‐power native NMOS‐based bandgap reference operating from −55°C to 125°C with Li‐Ion battery compatibility

Caselli

Liempd

Boni

et al. 2021

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

“…This work aims to focus on power supply rejection ratio (PSRR) since it is an important specification in RFEH power management system. Papers such as [8], [9], and [10] focus on the PSRR specification of bandgap reference. The techniques involved to increase PSRR involve voltage regulation of the transistor [8], cascoding transistors [9] and combination of cascode and voltage regulation [10].…”

Section: Introductionmentioning

confidence: 99%

“…Papers such as [8], [9], and [10] focus on the PSRR specification of bandgap reference. The techniques involved to increase PSRR involve voltage regulation of the transistor [8], cascoding transistors [9] and combination of cascode and voltage regulation [10]. Although these circuits will result in high PSRR, they exhibit weakness such as requiring relatively high-power supply, making it unsuitable for low power applications [8] and also cannot obtain a reference voltage of lower than 1.2V [9] which is crucial for circuits that operate in sub-threshold or near-threshold.…”

Section: Introductionmentioning

confidence: 99%

“…The techniques involved to increase PSRR involve voltage regulation of the transistor [8], cascoding transistors [9] and combination of cascode and voltage regulation [10]. Although these circuits will result in high PSRR, they exhibit weakness such as requiring relatively high-power supply, making it unsuitable for low power applications [8] and also cannot obtain a reference voltage of lower than 1.2V [9] which is crucial for circuits that operate in sub-threshold or near-threshold. In [10], high PSRR can only be obtained at higher voltage references, at near-threshold and sub-threshold voltage the PSRR degrades because of the usage of BJT which consumes a lot of voltage headroom at supply voltage of 1.2V.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

-81dB PSRR regulated cascode fully MOS bandgap reference for power management in RF energy harvesting systems

K.Zulkalnain

Kamsani

Sidek

et al. 2019

IJEECS

View full text Add to dashboard Cite

In the midst of technological advance where everything is connected via the internet, IoT is emerging as a potential solution to everything, ranging from health wearables to smart city. An RFEH power management system has promising benefits that could further improve the powering of IoT devices as it has potential for clean energy as well as other advantages which consists of a rectifier, bandgap reference and LDO as the main core. However, the main challenge is supplying clean and low noise power to sensitive circuits such as low power sensors, VCOs and PLLs. A high PSRR bandgap reference that rejects noise at the power supply is needed so that the circuitry powered by RFEH systems would be able to function properly. This paper presents a bandgap with MOS PTAT and CTAT extraction achieving a PSRR of -81dB at a V<sub>ref</sub> of 0.415V was designed on 130nm CMOS technology targeting IoT RFEH devices that operate at sub-threshold and near-threshold region that exhibits improvement over the base design.

show abstract

Analysis and design of a current-mode bandgap reference with high power supply ripple rejection

Wang

Zhan

Tang

et al. 2017

Microelectronics Journal

View full text Add to dashboard Cite

7.72 ppm/°C, ultralow power, high PSRR CMOS bandgap reference voltage

Cited by 7 publications

References 4 publications

A low‐power native NMOS‐based bandgap reference operating from −55°C to 125°C with Li‐Ion battery compatibility

A low‐power native NMOS‐based bandgap reference operating from −55°C to 125°C with Li‐Ion battery compatibility

-81dB PSRR regulated cascode fully MOS bandgap reference for power management in RF energy harvesting systems

Analysis and design of a current-mode bandgap reference with high power supply ripple rejection

Contact Info

Product

Resources

About