7.4 A covalent-bonded cross-coupled current-mode sense amplifier for STT-MRAM with 1T1MTJ common source-line structure array

Abstract

Spin transfer torque magnetoresistive RAM (STT-MRAM) is a potential candidate for next-generation universal memory technology with high density, high-speed access time, and nonvolatile characteristics. Due to good scalability of the magnetic tunnel junction (MTJ) cell in sub-20nm technical nodes, STT-MRAM also has potential as a system memory, possibly replacing DRAM or SRAM in some applications. However, from the circuit design point of view there are still technical obstacles such as wide random variation of MTJ and low tunnel magnetoresistance (TMR), which keep read-access time from being fast enough for a main memory application when using a 1T1MTJ cell. In several papers, various sensing circuit topologies are proposed to alleviate the weakness of the MTJ cell. A self-reference sensing scheme [1] is a classic one and the recent work on 64Mb array reported 11ns read-access time and 30ns cycle time with a 1.2V power supply [2].Designing sensing circuitry for STT-MRAM is challenging due to the small current difference between high and low resistance values and their high variation. Using a simple calculation method, the sensing current difference is estimated to be about 1 to 3μA using present TMR values. To manage the problems of small TMR and high variation, 2T2MTJ differential sensing topologies are proposed [3]. However, like in the 1T1C DRAM case, the 1T1MTJ common source-line (SL) structure is more favorable for high density main memory applications. For the 1T1MTJ cell it is necessary to provide good reference(s) for sensing circuitry, unlike the 2T2MTJ case. In general, reference voltage or current can either be externally forced using a pad or internally generated. For example, a reference cell can be placed beside normal cells to minimize statistical variations but this may consume extra chip area. Additionally, the read-disturb rate of MTJ must be suppressed such that the voltage across MTJ cells during read operations is well controlled, for example under half write voltage, in order to prevent unintentional writing. A key to the success of STT-MRAM in main memory application is to devise a sensing circuit for 1T1MTJ cells that is as good as that in conventional DRAM where the voltages of bitline (BL) and bitline bar (BLB) are working as innate sensing references for the simple cross-coupled latch.In this paper, we present a sensing scheme for STT-MRAM with 1T1MTJ common SL structure array: covalent-bonded cross-coupled current-mode sense amplifier (CBSA). The CBSA can fit in conventional DRAM array architecture and use two normal cells in adjacent BLs, one for storing data "1" and the other for storing data "0", for generating reference currents for CBSA. There are 64 CBSAs in a row of 8k cells, where one CBSA and two references BLs are shared by adjacent 128 BLs. STT-MRAM cell is directly accessed instead of page opening as in DRAM. By introducing CBSAs as sensing schemes, read-access time can be reduced to under 10ns with strong robustness against wide random variations of MTJ cell resistances wi...

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