65 nm RFCMOS technologies with bulk and HR SOI substrate for millimeter wave passives and circuits characterized up to 220 GHZ

Gianesello, F.; Gloria, D.; Montusclat, S.; Raynaud, C.; Boret, S.; Clement, C.; Dambrine, G.; Lepilliet, S.; Saguin, F.; Scheer, P.; Benech, Ph.; Fournier, Jean‐Michel

doi:10.1109/mwsym.2006.249810

Cited by 30 publications

(10 citation statements)

References 2 publications

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“…However, due to technology evolution and continuous decrease of the SiO 2 layer thickness, the signal line of the microstrip transmission lines has to be reduced in order to address 50 transmission lines, leading to an increase of the metallic losses. In (Gianesello et al, 2006), integrated transmission lines showing attenuation losses of 0.9 dB/mm at 10 GHz, and 3 dB/mm at 60 GHz have been demonstrated. However, highimpedance transmission lines can not be realized due to a drastic increase of the attenuation loss, and no efficient miniaturization way has been identified.…”

Section: State Of the Artmentioning

confidence: 99%

“…Attenuation loss of 2 dB/mm have been reported on conventional CPW transmission lines on silicon substrates fabricated through commercial CMOS foundries (Milanovic et al, 1998). Lower losses can be achieved (0.2 dB/mm and 0.6 dB/mm at 20 GHz and 60 GHz, respectively) by the use of a high-cost SOI CMOS technology using a high resistivity substrate (Gianesello et al, 2006). Besides, CPW quarter-wave transmission lines will result in relatively large occupying areas, depending of the working frequency on silicon substrates.…”

Section: State Of the Artmentioning

confidence: 99%

See 1 more Smart Citation

Integrated Silicon Microwave and Millimeterwave Passive Components and Functions

Benech¹,

Duchamp²,

Ferrari³

et al. 2010

Microwave and Millimeter Wave Technologies From Photonic Bandgap Devices to Antenna and Applications

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Section: State Of the Artmentioning

confidence: 99%

Section: State Of the Artmentioning

confidence: 99%

Integrated Silicon Microwave and Millimeterwave Passive Components and Functions

Benech¹,

Duchamp²,

Ferrari³

et al. 2010

Microwave and Millimeter Wave Technologies From Photonic Bandgap Devices to Antenna and Applications

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“…The Power amplifier illustrated in this paper was designed with a 65nm CMOS on bulk (resistivity ρ=20mΩ.cm) from STMicroelectronics [7]. Low power (LP) transistors were chosen as active devices.…”

Section: Cmos Technologymentioning

confidence: 99%

A 60GHz, 13 dBm fully integrated 65nm RF-CMOS power amplifier

Aloui

Kerhervé²,

Belot³

et al. 2008

2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference

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Abstract-A 65nm CMOS, 60GHz fully integrated power amplifier (PA) from STMicroelectronics has been designed for low cost Wireless Personal Area Network (WPAN). It has been optimized to deliver the maximum linear output power (OCP1) without using parallel amplification topology. The simulated OCP1 is equal to 8.9 dBm with a gain of 8dB. To obtain good performances and consume an ultra compact area of silicon, the PA has been matched and optimized with a mixed technique, using lumped and distributed elements. The chip size is 0.48mm*0.6mm including pads.

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“…3) and TL which do not (microstrip with ground plane as shield not presented here). Since microstrip TLs have demonstrated to have worse performances than CPW in advanced standard digital silicon BEOL with HR substrate [11] we have here focused our attention on CPW achieved on HR SOI. Since it has been demonstrated that in HR SOI substrate losses are drastically reduced, we propose here the use of a new stacked CPW TL dedicated to HR SOI technology.…”

Section: Nm Mosfet Performancesmentioning

confidence: 99%

65 nm HR SOI CMOS Technology: emergence of Millimeter-Wave SoC

Gianesello

Montusclat

Martineau

et al. 2007

2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium

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Today, measurement of 65 nm CMOS [1] and 130nm-based SiGe HBTs [2] technologies demonstrate both F T (current gain cut-off frequency) and Fmax (maximum oscillation frequency) higher than 200 GHz, which are clearly comparable to advanced commercially available 100 nm III-V HEMT. Consequently, the integration of full transceiver at 60 GHz has been achieved both in SiGe bipolar [3] and CMOS technology [4].In the same time passive circuits working @ 220 GHz have been achieved and characterized on High Resistivity SOI demonstrating state-of-the-art performances and good agreement with electrical simulations using developed models. Moreover, HR SOI has also demonstrated some advantages concerning the performances of integrated antennas [5] and a first fully integrated prototype with amplifier, filter and antenna has already been achieved using STMicroeletronics 130 nm CMOS HR SOI technology [6]. This paper will review the MMW performances of STMicrolectronics 65 nm CMOS HR SOI technology from device up to circuit level and discuss the opportunities of MMW SoC integrated on CMOS HR SOI technology.

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65 nm RFCMOS technologies with bulk and HR SOI substrate for millimeter wave passives and circuits characterized up to 220 GHZ

Cited by 30 publications

References 2 publications

Integrated Silicon Microwave and Millimeterwave Passive Components and Functions

Integrated Silicon Microwave and Millimeterwave Passive Components and Functions

A 60GHz, 13 dBm fully integrated 65nm RF-CMOS power amplifier

65 nm HR SOI CMOS Technology: emergence of Millimeter-Wave SoC

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