622/1244 Mb/s Burst-Mode CDR for GPONs

Faucher, J.; Mukadam, Mustansir; Li, Alan; Plant, David V.

doi:10.1109/leos.2006.279194

Cited by 9 publications

(6 citation statements)

References 8 publications

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“…In [21,22], a BM-CDR based on sampling the data at twice the bit rate (oversampling in time) is proposed with a novel phase-picking algorithm. and phase picking algorithm [21]; CDR: clock and data recovery; Des: deserializer; PLLs: phase-locked loops; BBERT: burst bit error rate tester.…”

Section: Burst-mode Cdr Based On Oversampling Algorithmmentioning

confidence: 99%

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3.5 Gb/s burst-mode clock phase aligner for gigabit passive optical networks

Zeng

Shastri

Zicha

et al. 2008

LEOS 2008 - 21st Annual Meeting of the IEEE Lasers and Electro-Optics Society

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Fiber to the Home (FTTH) has been proven to be an efficient medium for voice, audio, and video transfer. Passive Optical Networks (PONs) are being studied as an upgradeable and low-cost solution to the problem of limited bandwidth in local access networks in the medium of FTTH. In PONs, multiple users share the fiber infrastructure in a pointto-multipoint (P2MP) network topology. The P2MP nature of networks cause the data packets from each user to undergo different amplitude, phase, and frequency variations -resulting in burst-mode traffic at the receiving end of the network. This consequently creates new challenges for the design of optical receivers.We design and experimentally demonstrate a 5 Gb/s burst-mode clock phase aligner (BM-CPA) featuring automatic phase acquisition with forward-error correction using (64, 57) Hamming codes. This BM-CPA is implemented with commercially available evaluation boards and provides instantaneous (0-bit) phase acquisition with packet loss ratio < 10and bit error rate < 10 −10 for any phase step (±2π rads) between consecutive packets.Implementation of a Reed-Solomon(255, 239) code is also investigated. Our design is based on an oversampling algorithm and can be operated in two configurations: BM-CPA with a SONET CDR and BM-CPA with a local oscillator. We conclude by discussing various possible extensions to the device, based on the promising results.ii

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Section: Burst-mode Cdr Based On Oversampling Algorithmmentioning

confidence: 99%

“…and phase picking algorithm [21]; CDR: clock and data recovery; Des: deserializer; PLLs: phase-locked loops; BBERT: burst bit error rate tester.…”

Section: Burst-mode Cdr Based On Oversampling Algorithmmentioning

confidence: 99%

3.5 Gb/s burst-mode clock phase aligner for gigabit passive optical networks

Zeng

Shastri

Zicha

et al. 2008

LEOS 2008 - 21st Annual Meeting of the IEEE Lasers and Electro-Optics Society

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“…Automatic detection of the payload is implemented on the FPGA through a framer and a comma detector, which are responsible for detecting the beginning (delimiter bits) and the end (comma bits) of the packet, respectively. The CPA makes use of a phase picking algorithm in [10] and the CDR operating at 29 oversampling. The CPA is turned ON for the PLR measurements with phase acquisition for burst-mode reception when Du = 0 rad; otherwise, it can be bypassed for continuous-mode reception when Du = 0 rad.…”

Section: Building Blocksmentioning

confidence: 99%

“…The RS decoder is an IP core from the Xilinx LogiCORE portfolio. The FPGA-based BERT designed in [10] the payload of the packets. The BERT compares the incoming data with an internally generated 2 15 -1 PRBS.…”

Section: Burst-mode Receiver Functionalitiesmentioning

confidence: 99%

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Performance analysis of burst-mode receivers with clock phase alignment and forward error correction for GPON

Shastri

Faucher²,

Kheder

et al. 2008

Analog Integr Circ Sig Process

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We experimentally demonstrate the performance analysis of burst-mode receivers (BMRx) in a 622 Mb/s 20-km gigabit-capable passive optical network (GPON) uplink. Our receiver features automatic phase acquisition using a clock phase aligner (CPA), and forward-error correction using (255, 239) Reed-Solomon (RS) codes. The BMRx provides instantaneous (0 preamble bit) phase acquisition and a packet-loss ratio (PLR) \ 10 -6 for any phase step (±2p rads) between consecutive packets, while also supporting more than 600 consecutive identical digits (CIDs). The receiver also accomplishes a 3-dB coding gain at a bit-error rate (BER) of 10 -10 . The CPA makes use of a phase picking algorithm and an oversampling clock-and-data recovery circuit operated at 29 the bit rate. The receiver meets the GPON physical media dependent layer specifications defined in the ITU-T recommendation G.984.2 standard. We investigate the PLR performance of the system and quantify it as a function of the phase step between consecutive packets, received signal power, CID immunity, and BER, while also assessing the tradeoffs in preamble length, power penalty, and pattern correlator error resistance. We also study the impact of mode-partition noise in the GPON uplink in terms of the effective PLR and BER coding gain performance of the system. In addition, we demonstrate how the CPA and the RS(255, 239) codes can be used in tandem for dynamic burst-error correction giving reliable BERs in bursty channels.

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