6.2 GHz 0.5 mW two‐dimensional oscillator array‐based injection‐locked frequency divider in 0.18 μm CMOS

Abstract

A new two-dimensional oscillator array-based injection-locked frequency divider is proposed. Instead of using the conventional analogue tuning technique or the one-dimensional delay chain, a two-dimensional array is implemented to digitally and precisely control the total delay in the oscillator core. This makes it possible to achieve a programmable delay, hence attaining potential programmable division ratios for the injection-locked divider. Fabricated in a standard 0.18 μm CMOS technology, a prototype chip, namely a divide-by-4/5 prescaler using this technique, is able to work up to 6.2 GHz with 0.5 mW power consumption from a 1.8 V supply voltage.

A 11 mW 2.4 GHz 0.18 µm CMOS Transceivers for Wireless Sensor Networks

“…The frequency synthesizer has been a major bottleneck of fully-integrated transceivers [ 14 , 15 ]. Due to this large silicon area and power consumption, it is usually an off-chip sub-system in many ultra-low-power solutions.…”

“…The total division ratio is 2 × (52 + M), where is M is fractional number, which is controlled by a 10-bit sigma-delta modulator (configured as Mash 1-1-1); considering the short-range communication with low power and small silicon area, even the fractional spur can be quite high due the insufficient random dithering. Another key consideration is the power consumption [ 14 ]. In this work, the blocks in the frequency divider are designed to be power efficient at the certain working frequencies.…”

A low-power high-speed true single-phase clock-based divide-by-2/3 prescaler

“…They are used only for high frequency where other topologies cannot operate. Injection-locked prescalers can achieve a high operating frequency with lower power consumption [3,4]. However, they have a small input frequency locking range and limited output swing.…”