2007
DOI: 10.1889/1.2785637
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56.4: A Cascaded‐Dividing Current DAC with Fine Pitch for High‐Resolution AMOLED Display Drivers

Abstract: An 8-bit cascaded-dividing DAC that can operate at a low power supply voltage is proposed. Occupying less than one eleventh of the chip area of a conventional binary-weighted DAC with an equivalent resolution, the proposed DAC features a low operation voltage of 2 V with a good DNL and INL of less than 0.15 LSB. The proposed DAC is expected to be adequate for current-driving AMOLED drivers that have very demanding requirements of a narrow channel pitch as well as high linearity and resolution for the data chan… Show more

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Cited by 12 publications
(9 citation statements)
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“…The most impressive advantage of the cascaded-dividing DAC architecture is its area efficiency. This DAC structure enables very compact implementation of the DAC on a much smaller chip area than that of a conventional binary-weighted DAC structure using a MOSFET with an equivalent bit resolution [3]. Current from the DAC flows to the monitor pixel to sense the anode voltage variation due to OLED degradation.…”
Section: Proposed Luminance Compensation Scheme With Low Power Consummentioning
confidence: 99%
“…The most impressive advantage of the cascaded-dividing DAC architecture is its area efficiency. This DAC structure enables very compact implementation of the DAC on a much smaller chip area than that of a conventional binary-weighted DAC structure using a MOSFET with an equivalent bit resolution [3]. Current from the DAC flows to the monitor pixel to sense the anode voltage variation due to OLED degradation.…”
Section: Proposed Luminance Compensation Scheme With Low Power Consummentioning
confidence: 99%
“…A compact 9-bit segmented digital to analog converter (DAC) with a cascaded-dividing DAC structure for the 7-bit sub-DAC is used for the current DACs in each channel, which generates the data currents in the range of 10 nA-5 μA [5]. Fig.…”
Section: B Amoled Panel Application Of Itcf Drivermentioning
confidence: 99%
“…Consequently, the concept of the proposed interpolating buffer amplifier using the ratio of each tail current can interpolate the two voltages, ±ΔV and V MSB , and there is not any effect on the basic function of the original buffer amplifier. This tail current ratio can be easily achieved by the 4-bit cascaded current DAC [2]. Figure 2 shows a block diagram of column drive architecture with proposed interpolating buffer amplifier.…”
Section: / B Leementioning
confidence: 99%
“…The 4-bit cascaded-dividing current DAC with NMOS is shown in Figure 4. If the current divider 0 including a NMOS transistor pair (M 1 , M 2 ) and a current source shown in Figure 4 is considered, then it is clear that the current divider 0 can divide the current I tail into two equal quantities [2]. Current divider 1, divider 2, and divider 3 perform the same function as current divider 0 .…”
Section: Implementation Of the Proposed 10 Bit Dac With An Interpolatmentioning
confidence: 99%