51.2: The Development of a High Mobility Zinc Oxynitride TFT for AMOLED

218

162

Amorphous InGaZnO x (a-IGZO) thin-film transistors (TFTs) are currently used in flat-panel displays due to their beneficial properties. However, the mobility of ∼10 cm2/(V s) for the a-IGZO TFTs used in commercial organic light-emitting diode TVs is not satisfactory for high-resolution display applications such as virtual and augmented reality applications. In general, the electrical properties of amorphous oxide semiconductors are strongly dependent on their chemical composition; the indium (In)-rich IGZO achieves a high mobility of 50 cm2/(V s). However, the In-rich IGZO TFTs possess another issue of negative threshold voltage owing to intrinsically high carrier density. Therefore, the development of an effective way of carrier density suppression in In-rich IGZO will be a key strategy to the realization of practical high-mobility a-IGZO TFTs. In this study, we report that In-rich IGZO TFTs with vertically stacked InO x , ZnO x , and GaO x atomic layers exhibit excellent performances such as saturation mobilities of ∼74 cm2/(V s), threshold voltage of −1.3 V, on/off ratio of 8.9 × 108, subthreshold swing of 0.26 V/decade, and hysteresis of 0.2 V, while keeping a reasonable carrier density of ∼1017 cm–3. We found that the vertical dimension control of IGZO active layers is critical to TFT performance parameters such as mobility and threshold voltage. This study illustrates the potential advantages of atomic layer deposition processes for fabricating ultrahigh-mobility oxide TFTs.

Section: Introductionmentioning

confidence: 99%

Section: ■ Introductionmentioning

confidence: 99%

Amorphous IGZO TFT with High Mobility of ∼70 cm²/(V s) via Vertical Dimension Control Using PEALD

Sheng

Hong

Lee

et al. 2019

218

162

“…The surface of YHZO is where the transistor’s channel is formed, and the lower the surface roughness ( R q : 106 pm) of YHZO, the fewer elements hinder the movement of electrons, thereby increasing the mobility. The average mobility of a-IGZO in conventional transistors is about 10–15 cm 2 V –1 s –1 , and this value can be further improved with the presence of smooth YHZO surfaces . To calculate the linear electron mobility, we utilized the transfer curve data shown in Figure b. μ normale , linear = ∂ I sd ∂ V sg ( L C normali V sd W ) false( cm 2 .25em V − 1 .25em s − 1 false) …”

Section: Resultsmentioning

confidence: 99%

“…The average mobility of a-IGZO in conventional transistors is about 10−15 cm 2 V −1 s −1 , and this value can be further improved with the presence of smooth YHZO surfaces. 31 To calculate the linear electron mobility, we utilized the transfer curve data shown in Figure 4b.…”

Section: Electrical Analysis Of Fetft With Memory Function 231 Transi...mentioning

confidence: 99%

High-Performance Ferroelectric Thin Film Transistors with Large Memory Window Using Epitaxial Yttrium-Doped Hafnium Zirconium Gate Oxide

Kim,

Choi,

Lee

et al. 2024

Preventing ferroelectric materials from losing their ferroelectricity over a low thickness of several nanometers is crucial in developing multifunctional nanoelectronics. Epitaxially grown 5 at. % yttrium-doped Hf 0.5 Zr 0.5 O 2 (YHZO) thin films exhibit an atomically smooth surface, an ability to maintain ferroelectricity even at a thickness of 10 nm, and excellent insulating properties, making them suitable for use as gate oxides in ferroelectric thin film transistors (FeTFTs). Through the epitaxial growth of a YHZO/ La 0.67 Sr 0.33 MnO 3 (LSMO)/SrTiO 3 (STO) heterostructure, YHZO effectively retains its ferroelectricity and orthorhombic single phase, leading to enhancing electron mobility (∼19.74 cm 2 V −1 s −1 ) and memory window (3.7 V) in the amorphous InGaZnO 4 (a-IGZO)/YHZO/LSMO/STO FeTFTs. These FeTFTs demonstrate a consistent memory function with remarkable endurance (∼10 6 cycles) and retention (∼10 4 s). Furthermore, they sustain a constant memory window even under ±6 V bias stress for 10 4 s and exhibit excellent stability even under ±6 V/1 ms pulse cycling for 10 7 cycles. For comparison, a transistor with the same structure was fabricated using epitaxial nonferroelectric LaAlO 3 (LAO) and epitaxial undoped Hf 0.5 Zr 0.5 O 2 (HZO) as alternatives to YHZO. This study presents a novel approach to exploit the potential of YHZO in FeTFTs, contributing to the development of next-generation logic-in-memory.

“…Another difficulty associated with flexible substrates concerns their low thermal budget (≤250 °C), which limits the deposition and/or anneal temperature of thin films. For amorphous oxide TFTs based on indium tin oxide (ITO), which have higher mobility than conventional InGaZnO (μ ITO > 30 cm 2 V –1 s –1 , μ IGZO ≈ 10 cm 2 V –1 s –1 ), , a top-gated configuration can be difficult to achieve as it requires annealing at ≥200 °C for good gate modulation . This has more commonly led to demonstrations of back-gated, uncapped transistors, which are not well-suited for circuit implementation. , All of these issues hinder the potential of nanoscale flexible TFTs.…”

Section: Introductionmentioning

confidence: 99%

Flexible Nanoscale Amorphous Oxide Transistors with a Gold-Assisted Transfer Method

Wahid,

Daus,

Chen

et al. 2024

We present a new approach to achieve nanoscale transistors on ultrathin flexible substrates with conventional electron-beam lithography. Full devices are first fabricated on a gold sacrificial layer covering a rigid silicon substrate, and then coated with a polyimide film and released from the rigid substrate. This approach bypasses nanofabrication constraints on flexible substrates: (i) electron-beam surface charging, (ii) alignment inaccuracy due to the wavy substrate, and (iii) restricted thermal budgets. As a proof-of-concept, we demonstrate ∼100 nm long indium tin oxide (ITO) transistors on ∼6 μm thin polyimide. This is achieved with sub-20 nm misalignment or overlap between source (or drain) and gate contacts on flexible substrates for the first time. The estimated transit frequency of our well-aligned devices can be up to 3.3 GHz, which can be further improved by optimizing the device structure and performance.